Computer Logical Organization 简明教程

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Computer Logical Organization - Overview

在现代电子领域，术语 Digital 通常与计算机有关，因为术语 Digital 源自计算机通过计数数字执行运算的方式。多年来，数字电子技术仅应用于计算机系统。但现在，数字电子技术已用于许多其他应用。以下是大量使用 Digital electronics 的一些示例。

In the modern world of electronics, the term Digital is generally associated with a computer because the term Digital is derived from the way computers perform operation, by counting digits. For many years, the application of digital electronics was only in the computer system. But now-a-days, digital electronics is used in many other applications. Following are some of the examples in which Digital electronics is heavily used.

Industrial process control
Military system
Television
Communication system
Medical equipment
Radar
Navigation

Signal

Signal 可以定义为包含某些信息的一种物理量。它是某个或多个自变量的函数。信号有两种类型。

Signal can be defined as a physical quantity, which contains some information. It is a function of one or more than one independent variables. Signals are of two types.

Analog Signal
Digital Signal

Analog Signal

将 analog signal 定义为具有连续值的信号。模拟信号可以有无限多个不同的值。在现实世界中，自然界中观察到的大多数事物都是模拟的。以下是模拟信号的示例。

An analog signal is defined as the signal having continuous values. Analog signal can have infinite number of different values. In real world scenario, most of the things observed in nature are analog. Examples of the analog signals are following.

Temperature
Pressure
Distance
Sound
Voltage
Current
Power

Graphical representation of Analog Signal (Temperature)

处理模拟信号的电路称为模拟电路或系统。以下是模拟系统的示例。

The circuits that process the analog signals are called as analog circuits or system. Examples of the analog system are following.

Filter
Amplifiers
Television receiver
Motor speed controller

Disadvantage of Analog Systems

Less accuracy
Less versatility
More noise effect
More distortion
More effect of weather

Digital Signal

将 digital signal 定义为仅有有限数量的离散值的信号。数字信号不是连续信号。在数字电子计算器中，输入借助开关给出。该输入被转换为具有两个离散值或级别的电信号。其中一个可以称为低电平，另一个称为高电平。信号将始终为这两个电平之一。这种类型的信号称为数字信号。以下是数字信号的示例。

A digital signal is defined as the signal which has only a finite number of distinct values. Digital signals are not continuous signals. In the digital electronic calculator, the input is given with the help of switches. This input is converted into electrical signal which have two discrete values or levels. One of these may be called low level and another is called high level. The signal will always be one of the two levels. This type of signal is called digital signal. Examples of the digital signal are following.

Binary Signal
Octal Signal
Hexadecimal Signal

Graphical representation of the Digital Signal (Binary)

处理数字信号的电路称为数字系统或数字电路。以下是数字系统的示例。

The circuits that process the digital signals are called digital systems or digital circuits. Examples of the digital systems are following.

Registers
Flip-flop
Counters
Microprocessors

Advantage of Digital Systems

More accuracy
More versatility
Less distortion
Easy communicate
Possible storage of information

Comparison of Analog and Digital Signal

S.N.

Analog Signal

Digital Signal

Analog signal has infinite values.

Digital signal has a finite number of values.

Analog signal has a continuous nature.

Digital signal has a discrete nature.

Analog signal is generated by transducers and signal generators.

Digital signal is generated by A to D converter.

Example of analog signal − sine wave, triangular waves.

Example of digital signal − binary signal.

Digital Number System

数字系统只能理解位置数系，其中有一些符号称为数字，并且这些符号根据它们在数字中所处的位置表示不同的值。

A digital system can understand positional number system only where there are a few symbols called digits and these symbols represent different values depending on the position they occupy in the number.

使用以下方法可以确定数字中每个数字的值：

A value of each digit in a number can be determined using

The digit
The position of the digit in the number
The base of the number system (where base is defined as the total number of digits available in the number system).

Decimal Number System

我们日常生活中所使用的数字系统就是十进制数字系统。十进制数字系统基数为 10，因为其使用了 0 至 9 共 10 个数字。在十进制数字系统中，小数点左边的各个位置依次表示个位、十位、百位、千位等。

The number system that we use in our day-to-day life is the decimal number system. Decimal number system has base 10 as it uses 10 digits from 0 to 9. In decimal number system, the successive positions to the left of the decimal point represents units, tens, hundreds, thousands and so on.

每个位置都表示基数（10）的特定幂。例如，十进制数字 1234 由个位上的数字 4、十位上的数字 3、百位上的数字 2 和千位上的数字 1 组成，其值可以写成：

Each position represents a specific power of the base (10). For example, the decimal number 1234 consists of the digit 4 in the units position, 3 in the tens position, 2 in the hundreds position, and 1 in the thousands position, and its value can be written as

(1&times1000) + (2&times100) + (3&times10) + (4&timesl)
(1&times103) + (2&times102) + (3&times101)  + (4&timesl00)
1000 + 200 + 30 + 1
1234

作为一名计算机程序员或 IT 专业人士，你应对计算机中经常使用的以下数字系统有所了解。

As a computer programmer or an IT professional, you should understand the following number systems which are frequently used in computers.

S.N.

Number System & Description

*Binary Number System*Base 2. Digits used: 0, 1

*Octal Number System*Base 8. Digits used: 0 to 7

*Hexa Decimal Number System*Base 16. Digits used: 0 to 9, Letters used: A- F

Binary Number System

特性

Characteristics

Uses two digits, 0 and 1.
Also called base 2 number system
Each position in a binary number represents a 0 power of the base (2). Example: 20
Last position in a binary number represents an x power of the base (2). Example: 2x where x represents the last position - 1.

Example

二进制数字：101012

Binary Number: 101012

计算十进制当量 −

Calculating Decimal Equivalent −

Step

Binary Number

Decimal Number

Step 1

101012

1 × 24) + (0 × 23) + (1 × 22) + (0 × 21) + (1 × 2010

Step 2

101012

(16 + 0 + 4 + 0 + 1)10

Step 3

101012

2110

Note: 101012 通常写成 10101。

Note: 101012 is normally written as 10101.

Octal Number System

特性

Characteristics

Uses eight digits, 0,1,2,3,4,5,6,7.
Also called base 8 number system
Each position in an octal number represents a 0 power of the base (8). Example: 80
Last position in an octal number represents an x power of the base (8). Example: 8x where x represents the last position - 1.

Example

八进制数 − 125708

Octal Number − 125708

计算十进制当量 −

Calculating Decimal Equivalent −

Step

Octal Number

Decimal Number

Step 1

125708

1 × 84) + (2 × 83) + (5 × 82) + (7 × 81) + (0 × 8010

Step 2

125708

(4096 + 1024 + 320 + 56 + 0)10

Step 3

125708

549610

Note: 125708 通常写成 12570。

Note: 125708 is normally written as 12570.

Hexadecimal Number System

特性

Characteristics

Uses 10 digits and 6 letters, 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F.
Letters represents numbers starting from 10. A = 10, B = 11, C = 12, D = 13, E = 14, F = 15.
Also called base 16 number system.
Each position in a hexadecimal number represents a 0 power of the base (16). Example 160.
Last position in a hexadecimal number represents an x power of the base (16). Example 16x where x represents the last position - 1.

Example −

十六进制数：19FDE16

Hexadecimal Number: 19FDE16

计算十进制当量 −

Calculating Decimal Equivalent −

Step

Hexadecimal Number

Decimal Number

Step 1

19FDE16

1 × 164) + (9 × 163) + (F × 162) + (D × 161) + (E × 16010

Step 2

19FDE16

1 × 164) + (9 × 163) + (15 × 162) + (13 × 161) + (14 × 16010

Step 3

19FDE16

(65536 + 36864 + 3840 + 208 + 14)10

Step 4

19FDE16

10646210

Note − 19FDE16 通常写为 19FDE。

Note − 19FDE16 is normally written as 19FDE.

Number System Conversion

转换数字从一个进制到另一个进制有许多方法或技巧。我们将演示以下内容 −

There are many methods or techniques which can be used to convert numbers from one base to another. We’ll demonstrate here the following −

Decimal to Other Base System
Other Base System to Decimal
Other Base System to Non-Decimal
Shortcut method − Binary to Octal
Shortcut method − Octal to Binary
Shortcut method − Binary to Hexadecimal
Shortcut method − Hexadecimal to Binary

Decimal to Other Base System

步骤

Steps

Step 1 − Divide the decimal number to be converted by the value of the new base.
Step 2 − Get the remainder from Step 1 as the rightmost digit (least significant digit) of new base number.
Step 3 − Divide the quotient of the previous divide by the new base.
Step 4 − Record the remainder from Step 3 as the next digit (to the left) of the new base number.

重复步骤 3 和 4，从右向左取余数，直到步骤 3 中的商变成 0。

Repeat Steps 3 and 4, getting remainders from right to left, until the quotient becomes zero in Step 3.

这样得到的最后的余数就是新基数数的最高有效数字 (MSD)。

The last remainder thus obtained will be the Most Significant Digit (MSD) of the new base number.

Example −

十进制数：2910

Decimal Number: 2910

计算二进制等价——

Calculating Binary Equivalent −

Step	Operation	Result	Remainder
Step 1	29 / 2	14	1
Step 2	14 / 2	7	0
Step 3	7 / 2	3	1
Step 4	3 / 2	1	1
Step 5	1 / 2	0	1

如步骤 2 和步骤 4 中所述，余数必须按逆序排列，这样第一个余数就变成最低有效数字 (LSD)，最后一个余数就变成最高有效数字 (MSD)。

As mentioned in Steps 2 and 4, the remainders have to be arranged in the reverse order so that the first remainder becomes the Least Significant Digit (LSD) and the last remainder becomes the Most Significant Digit (MSD).

十进制数 − 2910 = 二进制数 − 111012。

Decimal Number − 2910 = Binary Number − 111012.

Other Base System to Decimal System

步骤

Steps

Step 1 − Determine the column (positional) value of each digit (this depends on the position of the digit and the base of the number system).
Step 2 − Multiply the obtained column values (in Step 1) by the digits in the corresponding columns.
Step 3 − Sum the products calculated in Step 2. The total is the equivalent value in decimal.

Example

二进制数 − 111012

Binary Number − 111012

计算十进制当量 −

Calculating Decimal Equivalent −

Step

Binary Number

Decimal Number

Step 1

111012

1 × 24) + (1 × 23) + (1 × 22) + (0 × 21) + (1 × 2010

Step 2

111012

(16 + 8 + 4 + 0 + 1)10

Step 3

111012

2910

二进制数 − 111012 = 十进制数 − 2910

Binary Number − 111012 = Decimal Number − 2910

Other Base System to Non-Decimal System

步骤

Steps

Step 1 − Convert the original number to a decimal number (base 10).
Step 2 − Convert the decimal number so obtained to the new base number.

Example

八进制数 − 258

Octal Number − 258

计算二进制等价——

Calculating Binary Equivalent −

Step 1 − Convert to Decimal

Step

Octal Number

Decimal Number

Step 1

258

2 × 81) + (5 × 8010

Step 2

258

(16 + 5 )10

Step 3

258

2110

八进制数 − 258 = 十进制数 − 2110

Octal Number − 258 = Decimal Number − 2110

Step 2 − Convert Decimal to Binary

Step	Operation	Result	Remainder
Step 1	21 / 2	10	1
Step 2	10 / 2	5	0
Step 3	5 / 2	2	1
Step 4	2 / 2	1	0
Step 5	1 / 2	0	1

十进制数 − 2110 = 二进制数 − 101012

Decimal Number − 2110 = Binary Number − 101012

八进制数 − 258 = 二进制数 − 101012

Octal Number − 258 = Binary Number − 101012

Shortcut method - Binary to Octal

步骤

Steps

Step 1 − Divide the binary digits into groups of three (starting from the right).
Step 2 − Convert each group of three binary digits to one octal digit.

Example

二进制数 − 101012

Binary Number − 101012

计算八进制等价−

Calculating Octal Equivalent −

Step	Binary Number	Octal Number
Step 1	101012	010 101
Step 2	101012	28 58
Step 3	101012	258

二进制数 − 101012 = 八进制数 − 258

Binary Number − 101012 = Octal Number − 258

Shortcut method - Octal to Binary

步骤

Steps

Step 1 − Convert each octal digit to a 3 digit binary number (the octal digits may be treated as decimal for this conversion).
Step 2 − Combine all the resulting binary groups (of 3 digits each) into a single binary number.

Example

八进制数 − 258

Octal Number − 258

计算二进制等价——

Calculating Binary Equivalent −

Step	Octal Number	Binary Number
Step 1	258	210 510
Step 2	258	0102 1012
Step 3	258	0101012

八进制数 − 258 = 二进制数 − 101012

Octal Number − 258 = Binary Number − 101012

Shortcut method - Binary to Hexadecimal

步骤

Steps

Step 1 − Divide the binary digits into groups of four (starting from the right).
Step 2 − Convert each group of four binary digits to one hexadecimal symbol.

Example

二进制数 − 101012

Binary Number − 101012

计算十六进制等值 −

Calculating hexadecimal Equivalent −

Step	Binary Number	Hexadecimal Number
Step 1	101012	0001 0101
Step 2	101012	110 510
Step 3	101012	1516

二进制数 − 101012 = 十六进制数 − 1516

Binary Number − 101012 = Hexadecimal Number − 1516

Shortcut method - Hexadecimal to Binary

步骤

Steps

Step 1 − Convert each hexadecimal digit to a 4 digit binary number (the hexadecimal digits may be treated as decimal for this conversion).
Step 2 − Combine all the resulting binary groups (of 4 digits each) into a single binary number.

Example

十六进制数 − 1516

Hexadecimal Number − 1516

计算二进制等价——

Calculating Binary Equivalent −

Step	Hexadecimal Number	Binary Number
Step 1	1516	110 510
Step 2	1516	00012 01012
Step 3	1516	000101012

十六进制数 − 1516 = 二进制数 − 101012

Hexadecimal Number − 1516 = Binary Number − 101012

Binary Codes

在编码中，当数字、字母或单词由一组特定符号表示时，我们说该数字、字母或单词正在被编码。一组符号称为代码。数字数据表示为二进制位组并存储和传输。该组也称为 binary code 。二进制代码由数字和字母数字字母表示。

In the coding, when numbers, letters or words are represented by a specific group of symbols, it is said that the number, letter or word is being encoded. The group of symbols is called as a code. The digital data is represented, stored and transmitted as group of binary bits. This group is also called as binary code. The binary code is represented by the number as well as alphanumeric letter.

Advantages of Binary Code

以下是二进制代码提供的优点列表。

Following is the list of advantages that binary code offers.

Binary codes are suitable for the computer applications.
Binary codes are suitable for the digital communications.
Binary codes make the analysis and designing of digital circuits if we use the binary codes.
Since only 0 & 1 are being used, implementation becomes easy.

Classification of binary codes

这些代码大致分为以下四类。

The codes are broadly categorized into following four categories.

Weighted Codes
Non-Weighted Codes
Binary Coded Decimal Code
Alphanumeric Codes
Error Detecting Codes
Error Correcting Codes

Weighted Codes

加权二进制码是遵循权重位置原则的二进制码。数字的每个位置代表一个特定的权重。数个代码系统可用于表示十进制位数 0 到 9。在这些代码中，每个十进制位数表示为一个由四位比特组成的组。

Weighted binary codes are those binary codes which obey the positional weight principle. Each position of the number represents a specific weight. Several systems of the codes are used to express the decimal digits 0 through 9. In these codes each decimal digit is represented by a group of four bits.

Non-Weighted Codes

在这种类型的二进制码中，不分配位置权重。非加权码的示例是 XS-3 码和格雷码。

In this type of binary codes, the positional weights are not assigned. The examples of non-weighted codes are Excess-3 code and Gray code.

Excess-3 code

XS-3 码也被称为 XS-3 码。它是一种非加权码，用于表示十进制数。XS-3 码字是从 8421 BCD 码字中派生出来的，在 8421 中，每个码字加上 (0011)2 或 (3)10。XS-3 码的获得方式如下所述 -

The Excess-3 code is also called as XS-3 code. It is non-weighted code used to express decimal numbers. The Excess-3 code words are derived from the 8421 BCD code words adding (0011)2 or (3)10 to each code word in 8421. The excess-3 codes are obtained as follows −

Example

Gray Code

它是非加权码，它不是算术码。这意味着没有为比特位置分配特定的权重。它有一个非常特殊的功能，即每次十进制数增加时只会改变一个比特，如图所示。由于一次仅改变一个比特，因此格雷码被称为单位距离代码。格雷码是一个循环码。格雷码不可用于算术运算。

It is the non-weighted code and it is not arithmetic codes. That means there are no specific weights assigned to the bit position. It has a very special feature that, only one bit will change each time the decimal number is incremented as shown in fig. As only one bit changes at a time, the gray code is called as a unit distance code. The gray code is a cyclic code. Gray code cannot be used for arithmetic operation.

Application of Gray code

Gray code is popularly used in the shaft position encoders.
A shaft position encoder produces a code word which represents the angular position of the shaft.

Binary Coded Decimal (BCD) code

在这个码中，每个十进制位数都表示为一个 4 位二进制数。BCD 是一种用二进制码表示每个十进制位数的方法。在 BCD 中，使用四位比特，我们可以表示十六个数字（0000 到 1111）。但在 BCD 码中，只使用了前十个（0000 到 1001）。其余六个代码组合即 1010 到 1111 在 BCD 中无效。

In this code each decimal digit is represented by a 4-bit binary number. BCD is a way to express each of the decimal digits with a binary code. In the BCD, with four bits we can represent sixteen numbers (0000 to 1111). But in BCD code only first ten of these are used (0000 to 1001). The remaining six code combinations i.e. 1010 to 1111 are invalid in BCD.

Advantages of BCD Codes

It is very similar to decimal system.
We need to remember binary equivalent of decimal numbers 0 to 9 only.

Disadvantages of BCD Codes

The addition and subtraction of BCD have different rules.
The BCD arithmetic is little more complicated.
BCD needs more number of bits than binary to represent the decimal number. So BCD is less efficient than binary.

Alphanumeric codes

一个二进制位或比特仅能表示两个符号，因为它只有两种状态'0' 或'1'。但这对于两台计算机之间的通信是不够的，因为我们需要更多的符号进行通信。这些符号是表示 26 个大写和小写字母、0 到 9 的数字、标点符号和其他符号所必需的。

A binary digit or bit can represent only two symbols as it has only two states '0' or '1'. But this is not enough for communication between two computers because there we need many more symbols for communication. These symbols are required to represent 26 alphabets with capital and small letters, numbers from 0 to 9, punctuation marks and other symbols.

字母数字代码是表示数字和字母字符的代码。此类代码通常也会表示其他字符，如符号以及传达信息所需的各种指令。字母数字代码至少应表示字母表的 10 个数字和 26 个字母，即总共 36 个项目。以下三个字母数字代码非常普遍地用于数据表示。

The alphanumeric codes are the codes that represent numbers and alphabetic characters. Mostly such codes also represent other characters such as symbol and various instructions necessary for conveying information. An alphanumeric code should at least represent 10 digits and 26 letters of alphabet i.e. total 36 items. The following three alphanumeric codes are very commonly used for the data representation.

American Standard Code for Information Interchange (ASCII).
Extended Binary Coded Decimal Interchange Code (EBCDIC).
Five bit Baudot Code.

ASCII 代码是 7 位代码，而 EBCDIC 是 8 位代码。ASCII 代码在世界范围内使用更普遍，而 EBCDIC 主要用于大型 IBM 计算机。

ASCII code is a 7-bit code whereas EBCDIC is an 8-bit code. ASCII code is more commonly used worldwide while EBCDIC is used primarily in large IBM computers.

Error Codes

有二进制代码技术可用于在数据传输期间检测和纠正数据。

There are binary code techniques available to detect and correct data during data transmission.

Error Code

Description

Error Detection and Correction

Error detection and correction code techniques

Codes Conversion

有许多方法或技术可以用来将代码从一种格式转换为另一种格式。我们将在本文中演示以下

There are many methods or techniques which can be used to convert code from one format to another. We’ll demonstrate here the following

Binary to BCD Conversion
BCD to Binary Conversion
BCD to Excess-3
Excess-3 to BCD

Binary to BCD Conversion

步骤

Steps

Step 1 — Convert the binary number to decimal.
Step 2 — Convert decimal number to BCD.

示例 − 将 (11101)2 转换为 BCD。

Example − convert (11101)2 to BCD.

Step 1 − Convert to Decimal

二进制数 − 111012

Binary Number − 111012

计算十进制当量 −

Calculating Decimal Equivalent −

Step

Binary Number

Decimal Number

Step 1

111012

1 × 24) + (1 × 23) + (1 × 22) + (0 × 21) + (1 × 2010

Step 2

111012

(16 + 8 + 4 + 0 + 1)10

Step 3

111012

2910

二进制数 − 111012 = 十进制数 − 2910

Binary Number − 111012 = Decimal Number − 2910

Step 2 − Convert to BCD

十进制数 − 2910

Decimal Number − 2910

计算 BCD 等价物。将每个数字转换为四位二进制数字等价物。

Calculating BCD Equivalent. Convert each digit into groups of four binary digits equivalent.

Step

Decimal Number

Conversion

Step 1

2910

00102 10012

Step 2

2910

00101001BCD

结果

Result

(11101)2 =  (00101001)BCD

BCD to Binary Conversion

步骤

Steps

Step 1 — Convert the BCD number to decimal.
Step 2 — Convert decimal to binary.

示例 − 将 (00101001)BCD 转换为二进制。

Example − convert (00101001)BCD to Binary.

Step 1 - Convert to BCD

BCD 数 − (00101001)BCD

BCD Number − (00101001)BCD

计算十进制等价物。将每四位数字转换为一组，并为每一组获取十进制等价物。

Calculating Decimal Equivalent. Convert each four digit into a group and get decimal equivalent for each group.

Step

BCD Number

Conversion

Step 1

(00101001)BCD

00102 10012

Step 2

(00101001)BCD

210 910

Step 3

(00101001)BCD

2910

BCD 数 − (00101001)BCD = 十进制数 − 2910

BCD Number − (00101001)BCD = Decimal Number − 2910

Step 2 - Convert to Binary

用于十进制到二进制转换的长除法方法。

Used long division method for decimal to binary conversion.

十进制数 − 2910

Decimal Number − 2910

计算二进制等价——

Calculating Binary Equivalent −

Step	Operation	Result	Remainder
Step 1	29 / 2	14	1
Step 2	14 / 2	7	0
Step 3	7 / 2	3	1
Step 4	3 / 2	1	1
Step 5	1 / 2	0	1

如步骤 2 和 4 中所述，余数必须按相反的顺序排列，以便第一个余数成为最低有效位数 (LSD)，最后一个余数成为最高有效位数 (MSD)。

As mentioned in Steps 2 and 4, the remainders have to be arranged in the reverse order so that the first remainder becomes the least significant digit (LSD) and the last remainder becomes the most significant digit (MSD).

十进制数 − 2910 = 二进制数 − 111012

Decimal Number − 2910 = Binary Number − 111012

结果

Result

(00101001)BCD = (11101)2

BCD to Excess-3

步骤

Steps

Step 1 — Convert BCD to decimal.
Step 2 — Add (3)10 to this decimal number.
Step 3 — Convert into binary to get excess-3 code.

示例 − 将 (0110)BCD 转换为超额 3。

Example − convert (0110)BCD to Excess-3.

Step 1 − Convert to decimal

(0110)BCD = 610

Step 2 − Add 3 to decimal

(6)10 + (3)10 = (9)10

Step 3 − Convert to Excess-3

(9)10 = (1001)2

结果

Result

(0110)BCD = (1001)XS-3

Excess-3 to BCD Conversion

步骤

Steps

Step 1 — Subtract (0011)2 from each 4 bit of excess-3 digit to obtain the corresponding BCD code.

示例 - 将 (10011010)XS-3 转换为 BCD。

Example − convert (10011010)XS-3 to BCD.

Given XS-3 number  = 1 0 0 1 1 0 1 0
Subtract (0011)2   = 1 0 0 1 0 1 1 1
                    --------------------
               BCD = 0 1 1 0   0 1 1 1

结果

Result

(10011010)XS-3 = (01100111)BCD

Complement Arithmetic

在数字计算机中使用补码是为了简化减法运算和逻辑运算。对于每个基数-r 系统（基数 r 表示数字系统的基数），共有两种类型的补码。

Complements are used in the digital computers in order to simplify the subtraction operation and for the logical manipulations. For each radix-r system (radix r represents base of number system) there are two types of complements.

S.N.

Complement

Description

Radix Complement

The radix complement is referred to as the r’s complement

Diminished Radix Complement

The diminished radix complement is referred to as the (r-1)'s complement

Binary system complements

由于二进制系统以 r = 2 为基数。因此，二进制系统的两种类型的补码为 2 补码和 1 补码。

As the binary system has base r = 2. So the two types of complements for the binary system are 2’s complement and 1’s complement.

1’s complement

一个数字的 1 补码可以通过将所有 1 改为 0，并将所有 0 改为 1 来获得。这称为取补码或 1 补码。1 补码示例如下。

The 1’s complement of a number is found by changing all 1’s to 0’s and all 0’s to 1’s. This is called as taking complement or 1’s complement. Example of 1’s Complement is as follows.

2’s complement

二进制数的 2 补码是通过将 1 补码的最低有效位 (LSB) 加 1 获得的。

The 2’s complement of binary number is obtained by adding 1 to the Least Significant Bit (LSB) of 1’s complement of the number.

2 补码 = 1 补码 + 1

2’s complement = 1’s complement + 1

2 补码示例如下。

Example of 2’s Complement is as follows.

Binary Arithmetic

二进制算术是所有数字计算机和许多其他数字系统的重要组成部分。

Binary arithmetic is essential part of all the digital computers and many other digital system.

Binary Addition

它是二进制减法、乘法和除法的关键。二进制加法有四条规则。

It is a key for binary subtraction, multiplication, division. There are four rules of binary addition.

在第四种情况下，二进制加法产生一个和（1 + 1 = 10），即 0 写在给定的列中，而 1 进位到下一列。

In fourth case, a binary addition is creating a sum of (1 + 1 = 10) i.e. 0 is written in the given column and a carry of 1 over to the next column.

Example − Addition

Binary Subtraction

Subtraction and Borrow ，这两个词将非常频繁地用于二进制减法。二进制减法有四条规则。

Subtraction and Borrow, these two words will be used very frequently for the binary subtraction. There are four rules of binary subtraction.

Example − Subtraction

Binary Multiplication

二进制乘法类似于十进制乘法。它比十进制乘法简单，因为只涉及 0 和 1。二进制乘法有四条规则。

Binary multiplication is similar to decimal multiplication. It is simpler than decimal multiplication because only 0s and 1s are involved. There are four rules of binary multiplication.

Example − Multiplication

Binary Division

二进制除法类似于十进制除法。它被称为长除法过程。

Binary division is similar to decimal division. It is called as the long division procedure.

Example − Division

Octal Arithmetic

Octal Number System

以下是八进制数系的特征：

Following are the characteristics of an octal number system.

Uses eight digits, 0,1,2,3,4,5,6,7.
Also called base 8 number system.
Each position in an octal number represents a 0 power of the base (8). Example: 80
Last position in an octal number represents an x power of the base (8). Example: 8x where x represents the last position - 1.

Example

八进制数 − 125708

Octal Number − 125708

计算十进制当量 −

Calculating Decimal Equivalent −

Step

Octal Number

Decimal Number

Step 1

125708

1 × 84) + (2 × 83) + (5 × 82) + (7 × 81) + (0 × 8010

Step 2

125708

(4096 + 1024 + 320 + 56 + 0)10

Step 3

125708

549610

Note − 125708 通常写为 12570。

Note − 125708 is normally written as 12570.

Octal Addition

以下八进制加法表可帮助你处理八进制加法。

Following octal addition table will help you to handle octal addition.

要使用此表，只需遵循本示例中使用的说明：加 68 和 58。在 A 列中找到 6，然后在 B 列中找到 5。两个数字之和在表中两个列相交的“和”区域中。

To use this table, simply follow the directions used in this example: Add 68 and 58. Locate 6 in the A column then locate the 5 in the B column. The point in 'sum' area where these two columns intersect is the 'sum' of two numbers.

68 + 58 = 138.

Example − Addition

Octal Subtraction

八进制数的减法遵循与在任何其他数系中的数的减法类似的规则。唯一的区别在于借位数。在十进制系统中，你借一组 10。在二进制系统中，你借一组 2。在八进制系统中，你借一组 8。

The subtraction of octal numbers follows the same rules as the subtraction of numbers in any other number system. The only variation is in borrowed number. In the decimal system, you borrow a group of 1010. In the binary system, you borrow a group of 210. In the octal system you borrow a group of 810.

Example − Subtraction

Hexadecimal Arithmetic

Hexadecimal Number System

十六进制数的特性如下：

Following are the characteristics of a hexadecimal number system.

Uses 10 digits and 6 letters, 0,1,2,3,4,5,6,7,8,9,A,B,C,D,E,F.
Letters represents numbers starting from 10. A = 10, B = 11, C = 12, D = 13, E = 14, F = 15.
Also called base 16 number system.
Each position in a hexadecimal number represents a 0 power of the base (16). Example − 160
Last position in a hexadecimal number represents an x power of the base (16). Example − 16x where x represents the last position - 1.

Example

十六进制数 - 19FDE16

Hexadecimal Number − 19FDE16

计算十进制当量 −

Calculating Decimal Equivalent −

Step

Hexadecimal Number

Decimal Number

Step 1

19FDE16

1 × 164) + (9 × 163) + (F × 162) + (D × 161) + (E × 16010

Step 2

19FDE16

1 × 164) + (9 × 163) + (15 × 162) + (13 × 161) + (14 × 16010

Step 3

19FDE16

(65536 + 36864 + 3840 + 208 + 14)10

Step 4

19FDE16

10646210

Note − 19FDE16 通常写为 19FDE。

Note − 19FDE16 is normally written as 19FDE.

Hexadecimal Addition

下面的十六进制加法表将帮助你高效地处理十六进制加法。

Following hexadecimal addition table will help you greatly to handle Hexadecimal addition.

使用此表格，只需遵循此示例中的步骤 - 加 A16 和 516。在 X 列中找到 A，然后在 Y 列中找到 5。这两个列相交的“求和”区域中的点就是两个数字的和。

To use this table, simply follow the directions used in this example − Add A16 and 516. Locate A in the X column then locate the 5 in the Y column. The point in 'sum' area where these two columns intersect is the sum of two numbers.

A16 + 516 = F16.

Example − Addition

Hexadecimal Subtraction

十六进制数减法遵循与任何其他数制中数字减法相同的规则。唯一变数在于借位。在十进制系统中，借位是成组的 1010。在二进制系统中，借位是成组的 210。在十六进制系统中，借位是成组的 1610。

The subtraction of hexadecimal numbers follow the same rules as the subtraction of numbers in any other number system. The only variation is in borrowed number. In the decimal system, you borrow a group of 1010. In the binary system, you borrow a group of 210. In the hexadecimal system you borrow a group of 1610.

Example - Subtraction

Boolean Algebra

布尔代数用于分析和简化数字（逻辑）电路。它只使用二进制数，即 0 和 1。它也被称为 Binary Algebra 或 logical Algebra 。布尔代数是由 George Boole 于 1854 年发明的。

Boolean Algebra is used to analyze and simplify the digital (logic) circuits. It uses only the binary numbers i.e. 0 and 1. It is also called as Binary Algebra or logical Algebra. Boolean algebra was invented by George Boole in 1854.

Rule in Boolean Algebra

以下是布尔代数中使用的重要规则。

Following are the important rules used in Boolean algebra.

Variable used can have only two values. Binary 1 for HIGH and Binary 0 for LOW.
Complement of a variable is represented by an overbar (-). Thus, complement of variable B is represented as . Thus if B = 0 then = 1 and B = 1 then = 0.
ORing of the variables is represented by a plus (+) sign between them. For example ORing of A, B, C is represented as A + B + C.
Logical ANDing of the two or more variable is represented by writing a dot between them such as A.B.C. Sometime the dot may be omitted like ABC.

Boolean Laws

有六种类型的布尔定律。

There are six types of Boolean Laws.

Commutative law

满足以下表达式的任何二进制运算都称为交换运算。

Any binary operation which satisfies the following expression is referred to as commutative operation.

交换定律指出，更改变量的顺序对逻辑电路的输出没有任何影响。

Commutative law states that changing the sequence of the variables does not have any effect on the output of a logic circuit.

Associative law

此定律指出，执行逻辑运算的顺序无关紧要，因为它们的效果相同。

This law states that the order in which the logic operations are performed is irrelevant as their effect is the same.

Distributive law

分配律规定了以下条件。

Distributive law states the following condition.

AND law

这些律使用 AND 运算。因此它们被称为 AND 律。

These laws use the AND operation. Therefore they are called as AND laws.

OR law

这些律使用 OR 运算。因此它们被称为 OR 律。

These laws use the OR operation. Therefore they are called as OR laws.

INVERSION law

此律使用 NOT 运算。反演律规定变量的双重反演产生原始变量自身。

This law uses the NOT operation. The inversion law states that double inversion of a variable results in the original variable itself.

Important Boolean Theorems

以下是一些重要的布尔定理：

Following are few important boolean Theorems.

Boolean function/theorems

Description

Boolean Functions

Boolean Functions and Expressions, K-Map and NAND Gates realization

De Morgan’s Theorems

De Morgan’s Theorem 1 and Theorem 2

Logic Gates

逻辑门是任何数字系统的基本构件。它是一个电子电路，具有一个或多个输入，但只有一个输出。输入和输出之间的关系基于一个 certain logic 。基于此，逻辑门被命名为 AND 门、OR 门、NOT 门等等。

Combinational Circuits

组合电路是一种电路，我们在电路中组合不同的门，例如编码器、译码器、多路复用器和解复用器。组合电路的一些特性如下 -

Combinational circuit is a circuit in which we combine the different gates in the circuit, for example encoder, decoder, multiplexer and demultiplexer. Some of the characteristics of combinational circuits are following −

The output of combinational circuit at any instant of time, depends only on the levels present at input terminals.
The combinational circuit do not use any memory. The previous state of input does not have any effect on the present state of the circuit.
A combinational circuit can have an n number of inputs and m number of outputs.

Block diagram

我们接下来将详细阐述几个重要的组合电路。

We’re going to elaborate few important combinational circuits as follows.

Half Adder

半加器是一种有两个输入和两个输出的组合逻辑电路。半加器电路旨在将两个单比特二进制数 A 和 B 相加。它是加两个 single 位数字的基本构建模块。此电路有两个输出 carry 和 sum 。

Half adder is a combinational logic circuit with two inputs and two outputs. The half adder circuit is designed to add two single bit binary number A and B. It is the basic building block for addition of two single bit numbers. This circuit has two outputs carry and sum.

Block diagram

Truth Table

Circuit Diagram

Full Adder

全加器旨在克服半加器电路的缺点。它可以将两个单比特数字 A 和 B 以及进位 c 相加。全加器是一个有三个输入和两个输出的组合电路。

Full adder is developed to overcome the drawback of Half Adder circuit. It can add two one-bit numbers A and B, and carry c. The full adder is a three input and two output combinational circuit.

Block diagram

Truth Table

Circuit Diagram

N-Bit Parallel Adder

全加器只能将两个单数字二进制数连同进位输入一起相加。但在实际中，我们需要将比一个比特长得多的二进制数相加。要加两个 n 位二进制数，我们需要使用 n 位并行加法器。它使用了级联的多位全加器。上一位全加器的进位输出连接到下一位全加器的进位输入。

The Full Adder is capable of adding only two single digit binary number along with a carry input. But in practical we need to add binary numbers which are much longer than just one bit. To add two n-bit binary numbers we need to use the n-bit parallel adder. It uses a number of full adders in cascade. The carry output of the previous full adder is connected to carry input of the next full adder.

4 Bit Parallel Adder

在框图中，A0 和 B0 表示四位字 A 和 B 的最低有效位。因此，全加器-0 是最低级。因此，其 Cin 已被永久设为 0。其余连接与 n 位并行加法器的连接完全相同，如图所示。四位并行加法器是一种非常常见的逻辑电路。

In the block diagram, A0 and B0 represent the LSB of the four bit words A and B. Hence Full Adder-0 is the lowest stage. Hence its Cin has been permanently made 0. The rest of the connections are exactly same as those of n-bit parallel adder is shown in fig. The four bit parallel adder is a very common logic circuit.

Block diagram

N-Bit Parallel Subtractor

可以通过取要减去的数的 1 或 2 的补数来进行减法。例如，可以通过将 B 的 1 或 2 的补数加到 A 来执行减法 (A-B)。这意味着我们可以使用二进制加法器来执行二进制减法。

The subtraction can be carried out by taking the 1’s or 2’s complement of the number to be subtracted. For example we can perform the subtraction (A-B) by adding either 1’s or 2’s complement of B to A. That means we can use a binary adder to perform the binary subtraction.

4 Bit Parallel Subtractor

首先将要减去的数字 (B) 通过反相器传递以获得其 1 的补数。然后，四位加法器将 A 和 B 的 2 的补数相加以产生减法。S3 S2 S1 S0 表示二进制减法 (A-B) 的结果，进位输出 Cout 表示结果的极性。如果 A > B，则 Cout = 0，二进制形式 (A-B) 的结果则 Cout = 1，结果为 2 的补数形式。

The number to be subtracted (B) is first passed through inverters to obtain its 1’s complement. The 4-bit adder then adds A and 2’s complement of B to produce the subtraction. S3 S2 S1 S0 represents the result of binary subtraction (A-B) and carry output Cout represents the polarity of the result. If A > B then Cout = 0 and the result of binary form (A-B) then Cout = 1 and the result is in the 2’s complement form.

Block diagram

Half Subtractors

半减法器是一种有两个输入和两个输出（差值和借位）的组合电路。它产生输入处两个二进制比特之间的差值，并且还生成一个输出（借位）以指示是否借用了 1。在减法 (A-B) 中，A 称为被减数位，B 称为减数位。

Half subtractor is a combination circuit with two inputs and two outputs (difference and borrow). It produces the difference between the two binary bits at the input and also produces an output (Borrow) to indicate if a 1 has been borrowed. In the subtraction (A-B), A is called as Minuend bit and B is called as Subtrahend bit.

Truth Table

Circuit Diagram

Full Subtractors

全减法器克服了半减法器的缺点。全减法器是具有三个输入 A、B、C 和两个输出 D 和 C' 的组合电路。A 是“被减数”、B 是“减数”、C 是前一阶段产生的“借位”，D 是差值输出，C' 是借位输出。

The disadvantage of a half subtractor is overcome by full subtractor. The full subtractor is a combinational circuit with three inputs A,B,C and two output D and C'. A is the 'minuend', B is 'subtrahend', C is the 'borrow' produced by the previous stage, D is the difference output and C' is the borrow output.

Truth Table

Circuit Diagram

Multiplexers

多路复用器是一种特殊类型的组合电路。有 n 个数据输入、一个输出和 m 个选择输入，其中 2m = n。它是一种数字电路，可选择 n 个数据输入中的一个并将其路由到输出。n 个输入中之一的选择通过所选输入来完成。根据应用于所选输入的数字代码，从 n 个数据源中选择一个并将其传输到单个输出 Y。E 称为选通或使能输入，它对于级联非常有用。它通常是一个低电平有效端，这意味着在低电平时，它将执行所需的操作。

Multiplexer is a special type of combinational circuit. There are n-data inputs, one output and m select inputs with 2m = n. It is a digital circuit which selects one of the n data inputs and routes it to the output. The selection of one of the n inputs is done by the selected inputs. Depending on the digital code applied at the selected inputs, one out of n data sources is selected and transmitted to the single output Y. E is called the strobe or enable input which is useful for the cascading. It is generally an active low terminal that means it will perform the required operation when it is low.

Block diagram

多路复用器有多种变化

Multiplexers come in multiple variations

2 : 1 multiplexer
4 : 1 multiplexer
16 : 1 multiplexer
32 : 1 multiplexer

Block Diagram

Truth Table

Demultiplexers

解复用器执行多路复用器的反向操作，即它接收一个输入并将其分配到多个输出上。它只有一个输入、n 个输出、m 个选择输入。一次只能通过选择线选择一个输出线，并且输入传输到所选输出线。解复用器等效于单刀多位开关，如图所示。

A demultiplexer performs the reverse operation of a multiplexer i.e. it receives one input and distributes it over several outputs. It has only one input, n outputs, m select input. At a time only one output line is selected by the select lines and the input is transmitted to the selected output line. A de-multiplexer is equivalent to a single pole multiple way switch as shown in fig.

解复用器有多种变化。

Demultiplexers comes in multiple variations.

1 : 2 demultiplexer
1 : 4 demultiplexer
1 : 16 demultiplexer
1 : 32 demultiplexer

Block diagram

Truth Table

Decoder

译码器是一种组合电路。它具有 n 个输入和最多 m = 2n 个输出。译码器与没有任何数据输入的解复用器相同。它执行与编码器完全相反的操作。

A decoder is a combinational circuit. It has n input and to a maximum m = 2n outputs. Decoder is identical to a demultiplexer without any data input. It performs operations which are exactly opposite to those of an encoder.

Block diagram

以下是译码器的示例。

Examples of Decoders are following.

Code converters
BCD to seven segment decoders
Nixie tube decoders
Relay actuator

2 to 4 Line Decoder

2 到 4 线译码器的框图如图所示。A 和 B 是两个输入，D 到 D 是四个输出。真值表解释了译码器的操作。它显示每个输出仅对特定的输入组合为 1。

The block diagram of 2 to 4 line decoder is shown in the fig. A and B are the two inputs where D through D are the four outputs. Truth table explains the operations of a decoder. It shows that each output is 1 for only a specific combination of inputs.

Block diagram

Truth Table

Logic Circuit

Encoder

编码器是一种组合电路，设计用于执行解码器的逆运算。编码器有 n 条输入线和 m 条输出线。编码器生成与数字输入数对应的 m 位二进制码。编码器接受 n 个输入数字字，并将其转换为 m 位另一个数字字。

Encoder is a combinational circuit which is designed to perform the inverse operation of the decoder. An encoder has n number of input lines and m number of output lines. An encoder produces an m bit binary code corresponding to the digital input number. The encoder accepts an n input digital word and converts it into an m bit another digital word.

Block diagram

以下是编码器的示例。

Examples of Encoders are following.

Priority encoders
Decimal to BCD encoder
Octal to binary encoder
Hexadecimal to binary encoder

Priority Encoder

这是一种特殊类型的编码器。优先考虑输入线。如果同时出现两个或多个输入线为 1，则将考虑具有最高优先级的输入线。有四个输入 D0、D1、D2、D3 和两个输出 Y0、Y1。在四个输入中，D3 具有最高优先级，而 D0 具有最低优先级。这意味着，如果 D3 = 1，则无论其他输入如何，Y1 Y1 = 11。类似地，如果 D3 = 0 且 D2 = 1，则无论其他输入如何，Y1 Y0 = 10。

This is a special type of encoder. Priority is given to the input lines. If two or more input line are 1 at the same time, then the input line with highest priority will be considered. There are four input D0, D1, D2, D3 and two output Y0, Y1. Out of the four input D3 has the highest priority and D0 has the lowest priority. That means if D3 = 1 then Y1 Y1 = 11 irrespective of the other inputs. Similarly if D3 = 0 and D2 = 1 then Y1 Y0 = 10 irrespective of the other inputs.

Block diagram

Truth Table

Logic Circuit

Sequential Circuits

组合电路不使用任何存储器。因此，输入的上一个状态不会对电路的当前状态产生任何影响。但顺序电路具有存储器，因此输出可以根据输入而变化。此类电路使用上一个输入、输出、时钟和存储器单元。

The combinational circuit does not use any memory. Hence the previous state of input does not have any effect on the present state of the circuit. But sequential circuit has memory so output can vary based on input. This type of circuits uses previous input, output, clock and a memory element.

Block diagram

Flip Flop

触发器是一种顺序电路，它通常对输入进行取样，并且仅在特定时间瞬间而不是持续不断地更改输出。触发器被称为边沿触发型，而不是像锁存器一样被称为电平触发型。

Flip flop is a sequential circuit which generally samples its inputs and changes its outputs only at particular instants of time and not continuously. Flip flop is said to be edge sensitive or edge triggered rather than being level triggered like latches.

S-R Flip Flop

本质上是使用 NAND 门的 S-R 锁存器，带有一个附加的 enable 输入。它还被称为电平触发 SR-FF。这种情况下，只有当使能输入 (E) 处于活动状态时，才会在输出中形成电路。简而言之，如果 E = 1，该电路将作为 S-R 锁存器工作，但如果 E = 0，输出不会发生变化。

It is basically S-R latch using NAND gates with an additional enable input. It is also called as level triggered SR-FF. For this, circuit in output will take place if and only if the enable input (E) is made active. In short this circuit will operate as an S-R latch if E = 1 but there is no change in the output if E = 0.

Block Diagram

Circuit Diagram

Truth Table

Operation

S.N.

Condition

Operation

S = R = 0 : No change

If S = R = 0 then output of NAND gates 3 and 4 are forced to become 1. Hence R' and S' both will be equal to 1. Since S' and R' are the input of the basic S-R latch using NAND gates, there will be no change in the state of outputs.

*S = 0, R = 1, E =

Since S = 0, output of NAND-3 i.e. R' = 1 and E = 1 the output of NAND-4 i.e. S' = 0. Hence Qn+1 = 0 and Qn+1 bar = 1. This is reset condition.

*S = 1, R = 0, E =

Output of NAND-3 i.e. R' = 0 and output of NAND-4 i.e. S' = 1. Hence output of S-R NAND latch is Qn+1 = 1 and Qn+1 bar = 0. This is the reset condition.

*S = 1, R = 1, E =

As S = 1, R = 1 and E = 1, the output of NAND gates 3 and 4 both are 0 i.e. S' = R' = 0. Hence the Race condition will occur in the basic NAND latch.

Master Slave JK Flip Flop

主从 JK FF 是两个 S-R FF 的级联，从第二个的输出到第一个的输入有反馈。主触发器是正面电平触发器。但由于时钟线中有反相器，从触发器将对负电平做出响应。因此，当时钟 = 1（正电平）时，主触发器处于活动状态，从触发器处于非活动状态。而当时钟 = 0（低电平）时，从触发器处于活动状态，主触发器处于非活动状态。

Master slave JK FF is a cascade of two S-R FF with feedback from the output of second to input of first. Master is a positive level triggered. But due to the presence of the inverter in the clock line, the slave will respond to the negative level. Hence when the clock = 1 (positive level) the master is active and the slave is inactive. Whereas when clock = 0 (low level) the slave is active and master is inactive.

Circuit Diagram

Truth Table

Operation

S.N.

Condition

Operation

J = K = 0 (No change)

When clock = 0, the slave becomes active and master is inactive. But since the S and R inputs have not changed, the slave outputs will also remain unchanged. Therefore outputs will not change if J = K =0.

J = 0 and K = 1 (Reset)

Clock = 1 − Master active, slave inactive. Therefore outputs of the master become Q1 = 0 and Q1 bar = 1. That means S = 0 and R =1. Clock = 0 − Slave active, master inactive. Therefore outputs of the slave become Q = 0 and Q bar = 1. Again clock = 1 − Master active, slave inactive. Therefore even with the changed outputs Q = 0 and Q bar = 1 fed back to master, its output will be Q1 = 0 and Q1 bar = 1. That means S = 0 and R = 1. Hence with clock = 0 and slave becoming active the outputs of slave will remain Q = 0 and Q bar = 1. Thus we get a stable output from the Master slave.

J = 1 and K = 0 (Set)

Clock = 1 − Master active, slave inactive. Therefore outputs of the master become Q1 = 1 and Q1 bar = 0. That means S = 1 and R =0. Clock = 0 − Slave active, master inactive. Therefore outputs of the slave become Q = 1 and Q bar = 0. Again clock = 1 − then it can be shown that the outputs of the slave are stabilized to Q = 1 and Q bar = 0.

J = K = 1 (Toggle)

Clock = 1 − Master active, slave inactive. Outputs of master will toggle. So S and R also will be inverted. Clock = 0 − Slave active, master inactive. Outputs of slave will toggle. These changed output are returned back to the master inputs. But since clock = 0, the master is still inactive. So it does not respond to these changed outputs. This avoids the multiple toggling which leads to the race around condition. The master slave flip flop will avoid the race around condition.

Delay Flip Flop / D Flip Flop

延迟触发器或 D 触发器是由 NAND 反相器连接在 S 和 R 输入之间形成的简单门控 S-R 锁存器。它只有一个输入。输入数据在一段时间后出现在输出中。由于输入和输出之间存在此数据延迟，因此它被称为延迟触发器。由于 NAND 反相器，S 和 R 将互为补码。因此，S = R = 0 或 S = R = 1，这些输入条件永远不会出现。这个问题可以通过 S R = 00 和 SR = 1 条件来避免。

Delay Flip Flop or D Flip Flop is the simple gated S-R latch with a NAND inverter connected between S and R inputs. It has only one input. The input data is appearing at the output after some time. Due to this data delay between i/p and o/p, it is called delay flip flop. S and R will be the complements of each other due to NAND inverter. Hence S = R = 0 or S = R = 1, these input condition will never appear. This problem is avoid by SR = 00 and SR = 1 conditions.

Block Diagram

Circuit Diagram

Truth Table

Operation

S.N.

Condition

Operation

*E =

*E = 1 and D =

Toggle Flip Flop / T Flip Flop

触发器切换器本质上是 J 和 K 端子始终连接在一起的 JK 触发器。它只有 T 所指示的输入，如符号图所示。正边缘触发 T 触发器的符号在框图中显示。

Toggle flip flop is basically a JK flip flop with J and K terminals permanently connected together. It has only input denoted by T as shown in the Symbol Diagram. The symbol for positive edge triggered T flip flop is shown in the Block Diagram.

Symbol Diagram

Block Diagram

Truth Table

Operation

S.N.

Condition

Operation

*T = 0, J = K =

Digital Registers

触发器是一种 1 位存储单元，可用于存储数字数据。为了以位的数量增加存储容量，我们必须使用一组触发器。这样的一组触发器被称为 Register 。 n-bit register 将包括 n 个触发器，并能够存储 n-bit 字。

Flip-flop is a 1 bit memory cell which can be used for storing the digital data. To increase the storage capacity in terms of number of bits, we have to use a group of flip-flop. Such a group of flip-flop is known as a Register. The n-bit register will consist of n number of flip-flop and it is capable of storing an n-bit word.

寄存器中的二进制数据可以在该寄存器中从一个触发器移动到另一个触发器。允许进行此类数据传输的寄存器被称为 shift registers 。移位寄存器的操作模式有四种。

The binary data in a register can be moved within the register from one flip-flop to another. The registers that allow such data transfers are called as shift registers. There are four mode of operations of a shift register.

Serial Input Serial Output
Serial Input Parallel Output
Parallel Input Serial Output
Parallel Input Parallel Output

Serial Input Serial Output

让所有触发器最初都处于复位条件，即 Q3 = Q2 = Q1 = Q0 = 0。如果将四位二进制数 1 1 1 1 输入寄存器，则应将此数字应用于 Din 位，首先应用 LSB 位。FF-3 的 D 输入即 D3 连接到串行数据输入 Din 。FF-3 输出即 Q3 连接到下一个触发器输入，即 D2，以此类推。

Let all the flip-flop be initially in the reset condition i.e. Q3 = Q2 = Q1 = Q0 = 0. If an entry of a four bit binary number 1 1 1 1 is made into the register, this number should be applied to Din bit with the LSB bit applied first. The D input of FF-3 i.e. D3 is connected to serial data input Din. Output of FF-3 i.e. Q3 is connected to the input of the next flip-flop i.e. D2 and so on.

Block Diagram

Operation

在应用时钟信号之前，令 Q3 Q2 Q1 Q0 = 0000，并将要输入数字的 LSB 位应用于 Din。所以 Din = D3 = 1。应用时钟。在时钟的第一个下降沿，FF-3 被置位，寄存器中存储的字为 Q3 Q2 Q1 Q0 = 1000。

Before application of clock signal, let Q3 Q2 Q1 Q0 = 0000 and apply LSB bit of the number to be entered to Din. So Din = D3 = 1. Apply the clock. On the first falling edge of clock, the FF-3 is set, and stored word in the register is Q3 Q2 Q1 Q0 = 1000.

将下一位应用于 Din。所以 Din = 1。时钟的下一次负沿到来后，FF-2 将置位，存储的字将变为 Q3 Q2 Q1 Q0 = 1100。

Apply the next bit to Din. So Din = 1. As soon as the next negative edge of the clock hits, FF-2 will set and the stored word change to Q3 Q2 Q1 Q0 = 1100.

将要存储的下一位即 1 应用于 Din。应用时钟脉冲。时钟的第三个负沿到来后，FF-1 将置位，输出将修改为 Q3 Q2 Q1 Q0 = 1110。

Apply the next bit to be stored i.e. 1 to Din. Apply the clock pulse. As soon as the third negative clock edge hits, FF-1 will be set and output will be modified to Q3 Q2 Q1 Q0 = 1110.

类似地，使用 Din = 1 并随着时钟的第四个负沿到来，寄存器中存储的字为 Q3 Q2 Q1 Q0 = 1111。

Similarly with Din = 1 and with the fourth negative clock edge arriving, the stored word in the register is Q3 Q2 Q1 Q0 = 1111.

Truth Table

Waveforms

Serial Input Parallel Output

In such types of operations, the data is entered serially and taken out in parallel fashion.
Data is loaded bit by bit. The outputs are disabled as long as the data is loading.
As soon as the data loading gets completed, all the flip-flops contain their required data, the outputs are enabled so that all the loaded data is made available over all the output lines at the same time.
4 clock cycles are required to load a four bit word. Hence the speed of operation of SIPO mode is same as that of SISO mode.

Block Diagram

Parallel Input Serial Output (PISO)

Data bits are entered in parallel fashion.
The circuit shown below is a four bit parallel input serial output register.
Output of previous Flip Flop is connected to the input of the next one via a combinational circuit.
The binary input word B0, B1, B2, B3 is applied though the same combinational circuit.
There are two modes in which this circuit can work namely - shift mode or load mode.

Load mode

当移位/加载禁止线为低电平 (0) 时，与门 2、4 和 6 变得活跃，它们将 B1、B2、B3 位传递到相应的触发器。在时钟的下降沿，二进制输入 B0、B1、B2、B3 将被加载到相应的触发器中。从而进行并行加载。

When the shift/load bar line is low (0), the AND gate 2, 4 and 6 become active they will pass B1, B2, B3 bits to the corresponding flip-flops. On the low going edge of clock, the binary input B0, B1, B2, B3 will get loaded into the corresponding flip-flops. Thus parallel loading takes place.

Shift mode

当移位/加载禁止线为低电平 (1) 时，与门 2、4 和 6 变得不活跃。因此，数据的并行加载是不可能的。但与门 1、3 和 5 变得活跃。因此，在施加时钟脉冲时，数据逐位从左向右移位。从而进行了并行输入串行输出操作。

When the shift/load bar line is low (1), the AND gate 2, 4 and 6 become inactive. Hence the parallel loading of the data becomes impossible. But the AND gate 1,3 and 5 become active. Therefore the shifting of data from left to right bit by bit on application of clock pulses. Thus the parallel in serial out operation takes place.

Block Diagram

Parallel Input Parallel Output (PIPO)

在这种模式下，4 位二进制输入 B0、B1、B2、B3 分别应用到四个触发器的各自数据输入 D0、D1、D2、D3。一旦施加负时钟沿，输入二进制位将同时加载到触发器中。加载的位将同时出现在输出侧。只有时钟脉冲对于加载所有位是必不可少的。

In this mode, the 4 bit binary input B0, B1, B2, B3 is applied to the data inputs D0, D1, D2, D3 respectively of the four flip-flops. As soon as a negative clock edge is applied, the input binary bits will be loaded into the flip-flops simultaneously. The loaded bits will appear simultaneously to the output side. Only clock pulse is essential to load all the bits.

Block Diagram

Bidirectional Shift Register

If a binary number is shifted left by one position then it is equivalent to multiplying the original number by 2. Similarly if a binary number is shifted right by one position then it is equivalent to dividing the original number by 2.
Hence if we want to use the shift register to multiply and divide the given binary number, then we should be able to move the data in either left or right direction.
Such a register is called bi-directional register. A four bit bi-directional shift register is shown in fig.
There are two serial inputs namely the serial right shift data input DR, and the serial left shift data input DL along with a mode select input (M).

Block Diagram

Operation

S.N.

Condition

Operation

With M = 1 − Shift right operation

If M = 1, then the AND gates 1, 3, 5 and 7 are enabled whereas the remaining AND gates 2, 4, 6 and 8 will be disabled. The data at DR is shifted to right bit by bit from FF-3 to FF-0 on the application of clock pulses. Thus with M = 1 we get the serial right shift operation.

With M = 0 − Shift left operation

When the mode control M is connected to 0 then the AND gates 2, 4, 6 and 8 are enabled while 1, 3, 5 and 7 are disabled. The data at DL is shifted left bit by bit from FF-0 to FF-3 on the application of clock pulses. Thus with M = 0 we get the serial right shift operation.

Universal Shift Register

只能将数据在一个方向移动的移位寄存器称为单向移位寄存器。可以将数据在两个方向移动的移位寄存器称为双向移位寄存器。运用相同的逻辑，一个可以将数据在两个方向移动并将其并行加载的移位寄存器称为通用移位寄存器。移位寄存器能够执行以下操作：

A shift register which can shift the data in only one direction is called a uni-directional shift register. A shift register which can shift the data in both directions is called a bi-directional shift register. Applying the same logic, a shift register which can shift the data in both directions as well as load it parallely, is known as a universal shift register. The shift register is capable of performing the following operation −

Parallel loading
Left Shifting
Right shifting

对于并行加载操作，模式控制输入连接到逻辑 1，而对于串行移位，其连接到 0。当模式控制引脚连接到接地时，通用移位寄存器充当双向寄存器。对于串行左操作，输入应用于图中所示与与门 1 相连的串行输入。而对于移位右操作，串行输入应用于 D 输入。

The mode control input is connected to logic 1 for parallel loading operation whereas it is connected to 0 for serial shifting. With mode control pin connected to ground, the universal shift register acts as a bi-directional register. For serial left operation, the input is applied to the serial input which goes to AND gate-1 shown in figure. Whereas for the shift right operation, the serial input is applied to D input.

Block Diagram

Digital Counters

计数器是一种顺序电路。用于计数脉冲的数字电路称为计数器。计数器是触发器的最广泛应用。它是一组带有时钟信号的触发器。计数器有两种类型。

Counter is a sequential circuit. A digital circuit which is used for a counting pulses is known counter. Counter is the widest application of flip-flops. It is a group of flip-flops with a clock signal applied. Counters are of two types.

Asynchronous or ripple counters.
Synchronous counters.

Asynchronous or ripple counters

图中所示为 2 位波纹上升计数器的逻辑图。正在使用触发器(T)翻转。但我们也可以使用 JK 触发器，将 J 和 K 永久连接到逻辑 1。外部时钟应用于触发器 A 的时钟输入，QA 输出应用于下一触发器（即 FF-B）的时钟输入。

The logic diagram of a 2-bit ripple up counter is shown in figure. The toggle (T) flip-flop are being used. But we can use the JK flip-flop also with J and K connected permanently to logic 1. External clock is applied to the clock input of flip-flop A and QA output is applied to the clock input of the next flip-flop i.e. FF-B.

Logical Diagram

Operation

S.N.

Condition

Operation

Initially let both the FFs be in the reset state

QBQA = 00 initially

After 1st negative clock edge

As soon as the first negative clock edge is applied, FF-A will toggle and QA will be equal to 1. QA is connected to clock input of FF-B. Since QA has changed from 0 to 1, it is treated as the positive clock edge by FF-B. There is no change in QB because FF-B is a negative edge triggered FF. QBQA = 01 after the first clock pulse.

After 2nd negative clock edge

On the arrival of second negative clock edge, FF-A toggles again and QA = 0. The change in QA acts as a negative clock edge for FF-B. So it will also toggle, and QB will be 1. QBQA = 10 after the second clock pulse.

After 3rd negative clock edge

On the arrival of 3rd negative clock edge, FF-A toggles again and QA become 1 from 0. Since this is a positive going change, FF-B does not respond to it and remains inactive. So QB does not change and continues to be equal to 1. QBQA = 11 after the third clock pulse.

After 4th negative clock edge

On the arrival of 4th negative clock edge, FF-A toggles again and QA becomes 1 from 0. This negative change in QA acts as clock pulse for FF-B. Hence it toggles to change QB from 1 to 0. QBQA = 00 after the fourth clock pulse.

Truth Table

Synchronous counters

如果“时钟”脉冲同时应用于计数器中的所有触发器，则这样的计数器称为同步计数器。

If the "clock" pulses are applied to all the flip-flops in a counter simultaneously, then such a counter is called as synchronous counter.

2-bit Synchronous up counter

FF-A 的 JA 和 KA 输入与逻辑 1 绑在一起。因此，FF-A 将作为触发器翻转。JB 和 KB 输入连接到 QA。

The JA and KA inputs of FF-A are tied to logic 1. So FF-A will work as a toggle flip-flop. The JB and KB inputs are connected to QA.

Logical Diagram

Operation

S.N.

Condition

Operation

Initially let both the FFs be in the reset state

QBQA = 00 initially.

After 1st negative clock edge

As soon as the first negative clock edge is applied, FF-A will toggle and QA will change from 0 to 1. But at the instant of application of negative clock edge, QA , JB = KB = 0. Hence FF-B will not change its state. So QB will remain 0. QBQA = 01 after the first clock pulse.

After 2nd negative clock edge

On the arrival of second negative clock edge, FF-A toggles again and QA changes from 1 to 0. But at this instant QA was 1. So JB = KB= 1 and FF-B will toggle. Hence QB changes from 0 to 1. QBQA = 10 after the second clock pulse.

After 3rd negative clock edge

On application of the third falling clock edge, FF-A will toggle from 0 to 1 but there is no change of state for FF-B. QBQA = 11 after the third clock pulse.

After 4th negative clock edge

On application of the next clock pulse, QA will change from 1 to 0 as QB will also change from 1 to 0. QBQA = 00 after the fourth clock pulse.

Classification of counters

根据计数进行的方式，同步或异步计数器分类如下：

Depending on the way in which the counting progresses, the synchronous or asynchronous counters are classified as follows −

Up counters
Down counters
Up/Down counters

UP/DOWN Counter

上升计数器和下降计数器结合在一起得到一个上升/下降计数器。还提供了模式控制 (M) 输入以选择上升或下降模式。必须设计并使用组合电路，放在每对触发器之间，以实现上升/下降操作。

Up counter and down counter is combined together to obtain an UP/DOWN counter. A mode control (M) input is also provided to select either up or down mode. A combinational circuit is required to be designed and used between each pair of flip-flop in order to achieve the up/down operation.

Type of up/down counters
UP/DOWN ripple counters
UP/DOWN synchronous counter

UP/DOWN Ripple Counters

在 UP/DOWN 纹波计数器里，所有 FF 以切换模式运行。因此，要使用 T 触发器或 JK 触发器。MSB 触发器直接接收时钟。但每个其他 FF 的时钟都从前一个 FF 的 (Q = Q_bar) 输出获得。

In the UP/DOWN ripple counter all the FFs operate in the toggle mode. So either T flip-flops or JK flip-flops are to be used. The LSB flip-flop receives clock directly. But the clock to every other FF is obtained from (Q = Q bar) output of the previous FF.

UP counting mode (M=0) − The Q output of the preceding FF is connected to the clock of the next stage if up counting is to be achieved. For this mode, the mode select input M is at logic 0 (M=0).
DOWN counting mode (M=1) − If M = 1, then the Q bar output of the preceding FF is connected to the next FF. This will operate the counter in the counting mode.

Example

3 位二进制上升/下降纹波计数器。

3-bit binary up/down ripple counter.

3-bit − hence three FFs are required.
UP/DOWN − So a mode control input is essential.
For a ripple up counter, the Q output of preceding FF is connected to the clock input of the next one.
For a ripple up counter, the Q output of preceding FF is connected to the clock input of the next one.
For a ripple down counter, the Q bar output of preceding FF is connected to the clock input of the next one.
Let the selection of Q and Q bar output of the preceding FF be controlled by the mode control input M such that, If M = 0, UP counting. So connect Q to CLK. If M = 1, DOWN counting. So connect Q bar to CLK.

Block Diagram

Truth Table

Operation

S.N.

Condition

Operation

Case 1 − With M = 0 (Up counting mode)

If M = 0 and M bar = 1, then the AND gates 1 and 3 in fig. will be enabled whereas the AND gates 2 and 4 will be disabled. Hence QA gets connected to the clock input of FF-B and QB gets connected to the clock input of FF-C. These connections are same as those for the normal up counter. Thus with M = 0 the circuit work as an up counter.

Case 2: With M = 1 (Down counting mode)

If M = 1, then AND gates 2 and 4 in fig. are enabled whereas the AND gates 1 and 3 are disabled. Hence QA bar gets connected to the clock input of FF-B and QB bar gets connected to the clock input of FF-C. These connections will produce a down counter. Thus with M = 1 the circuit works as a down counter.

Modulus Counter (MOD-N Counter)

2 位纹波计数器称为 MOD-4 计数器，3 位纹波计数器称为 MOD-8 计数器。因此，一般来说，n 位纹波计数器称为模 N 计数器。其中，MOD 数 = 2^n。

The 2-bit ripple counter is called as MOD-4 counter and 3-bit ripple counter is called as MOD-8 counter. So in general, an n-bit ripple counter is called as modulo-N counter. Where, MOD number = 2n.

Type of modulus

2-bit up or down (MOD-4)
3-bit up or down (MOD-8)
4-bit up or down (MOD-16)

Application of counters

Frequency counters
Digital clock
Time measurement
A to D converter
Frequency divider circuits
Digital triangular wave generator.

Memory Devices

存储器就像人脑。用于存储数据和指令。计算机内存是计算机中的存储空间，其中要处理的数据和处理所需的指令存储在其中。

A memory is just like a human brain. It is used to store data and instruction. Computer memory is the storage space in computer where data is to be processed and instructions required for processing are stored.

存储器被分成许多小部分。每个部分称为一个单元。每个位置或单元都有一个唯一的地址，范围从零到存储器大小减一。

The memory is divided into large number of small parts. Each part is called a cell. Each location or cell has a unique address which varies from zero to memory size minus one.

例如，如果计算机有 64k 个字，则该存储器单元有 64 * 1024 = 65536 个存储器位置。这些位置的地址范围从 0 到 65535。

For example if computer has 64k words, then this memory unit has 64 * 1024 = 65536 memory location. The address of these locations varies from 0 to 65535.

内存主要分为两种类型

Memory is primarily of two types

Internal Memory − cache memory and primary/main memory
External Memory − magnetic disk / optical disk etc.

当我们从上到下时，内存层次结构的特征如下。

Characteristics of Memory Hierarchy are following when we go from top to bottom.

Capacity in terms of storage increases.
Cost per bit of storage decreases.
Frequency of access of the memory by the CPU decreases.
Access time by the CPU increases.

RAM

RAM 构成 CPU 的内部存储器，用于存储数据、程序和程序结果。它是读写内存。它被称为随机存取存储器 (RAM)。

A RAM constitutes the internal memory of the CPU for storing data, program and program result. It is read/write memory. It is called random access memory (RAM).

由于 RAM 中的访问时间与该字的地址无关，即存储器内部的每个存储位置都与其他位置一样容易到达，并且需要花费相同的时间。我们可以随机且极其快速地进入内存，但也可以非常昂贵。

Since access time in RAM is independent of the address to the word that is, each storage location inside the memory is as easy to reach as other location & takes the same amount of time. We can reach into the memory at random & extremely fast but can also be quite expensive.

RAM 是易失性的，即当我们关闭计算机或断电时，存储在其中的数据将丢失。因此，计算机通常使用备用不间断电源系统 (UPS)。RAM 很小，无论是在物理尺寸方面还是能够容纳的数据量方面。

RAM is volatile, i.e. data stored in it is lost when we switch off the computer or if there is a power failure. Hence, a backup uninterruptible power system (UPS) is often used with computers. RAM is small, both in terms of its physical size and in the amount of data it can hold.

RAM 分为两种类型

RAM is of two types

Static RAM (SRAM)
Dynamic RAM (DRAM)

Static RAM (SRAM)

static 字表示只要有电源供应，内存就会保留其内容。然而，由于易失性，在电源关闭时数据丢失。SRAM 芯片使用 6 晶体管矩阵且没有电容器。晶体管不需要电力来防止泄漏，因此 SRAM 不需要定期刷新。

The word static indicates that the memory retains its contents as long as power remains applied. However, data is lost when the power gets down due to volatile nature. SRAM chips use a matrix of 6-transistors and no capacitors. Transistors do not require power to prevent leakage, so SRAM need not have to be refreshed on a regular basis.

由于矩阵中有额外空间，SRAM 用的芯片比 DRAM 多，存储空间相同，因此制造成本更高。

Because of the extra space in the matrix, SRAM uses more chips than DRAM for the same amount of storage space, thus making the manufacturing costs higher.

SRAM 用作高速小型的缓存。

Static RAM is used as cache memory needs to be very fast and small.

Dynamic RAM (DRAM)

与 SRAM 不同，DRAM 必须持续进行 refreshed 才能维持数据。做法是将内存放在刷新电路中，以每秒数百次的速度重写数据。DRAM 用作大多数系统内存，因为它便宜且小巧。所有 DRAM 都由存储单元构成。这些单元由一个电容器和一个晶体管组成。

DRAM, unlike SRAM, must be continually refreshed in order for it to maintain the data. This is done by placing the memory on a refresh circuit that rewrites the data several hundred times per second. DRAM is used for most system memory because it is cheap and small. All DRAMs are made up of memory cells. These cells are composed of one capacitor and one transistor.

ROM

ROM 代表只读存储，即只能读取但无法写入的存储器。这种类型的存储器是非易失性的。信息在制造过程中永久存储在这样的存储器中。

ROM stands for Read Only Memory. The memory from which we can only read but cannot write on it. This type of memory is non-volatile. The information is stored permanently in such memories during manufacture.

ROM 存储计算机第一次通电时启动计算机所需的指令，此操作称为引导。ROM 芯片不仅用于计算机，还用于洗衣机和微波炉等其他电子设备。

A ROM, stores such instruction as are required to start computer when electricity is first turned on, this operation is referred to as bootstrap. ROM chip are not only used in the computer but also in other electronic items like washing machine and microwave oven.

以下是各种类型的 ROM：

Following are the various types of ROM −

MROM (Masked ROM)

· 第一个 ROM 是硬接线设备，包含预编程的数据或指令集。此类 ROM 称为屏蔽 ROM，价格低廉。

The very first ROMs were hard-wired devices that contained a pre-programmed set of data or instructions. These kind of ROMs are known as masked ROMs. It is inexpensive ROM.

PROM (Programmable Read Only Memory)

· PROM 是用户只能修改一次的只读存储器。用户购买空白 PROM，并使用 PROM 编程器输入所需内容。PROM 芯片内部有小型的保险丝，在编程过程中被烧断。它只能编程一次，无法擦除。

PROM is read-only memory that can be modified only once by a user. The user buys a blank PROM and enters the desired contents using a PROM programmer. Inside the PROM chip there are small fuses which are burnt open during programming. It can be programmed only once and is not erasable.

EPROM (Erasable and Programmable Read Only Memory)

· EPROM 可以通过将其暴露于紫外线下长达 40 分钟来擦除。通常，EPROM 擦除器可实现此功能。在编程期间，电荷被困在绝缘栅区域中。此电荷保持时间超过 10 年，原因是电荷没有泄漏路径。要清除此电荷，紫外线会通过石英晶体窗口（盖子）进行照射。接触紫外线会耗散电荷。正常使用时，石英盖用贴纸密封。

The EPROM can be erased by exposing it to ultra-violet light for a duration of upto 40 minutes. Usually, an EPROM eraser achieves this function. During programming an electrical charge is trapped in an insulated gate region. The charge is retained for more than ten years because the charge has no leakage path. For erasing this charge, ultra-violet light is passed through a quartz crystal window (lid). This exposure to ultra-violet light dissipates the charge. During normal use the quartz lid is sealed with a sticker.

EEPROM (Electrically Erasable and Programmable Read Only Memory)

· EEPROM 可以通过电子方式编程和擦除。它可以擦除并重新编程约一万次。擦除和编程均大约需要 4 到 10 毫秒（毫秒）。在 EEPROM 中，可以有选择地擦除和编程任何位置。EEPROM 每次可以擦除一个字节，而不是擦除整个芯片。因此，重新编程的过程灵活但速度较慢。

The EEPROM is programmed and erased electrically. It can be erased and reprogrammed about ten thousand times. Both erasing and programming take about 4 to 10 ms (millisecond). In EEPROM, any location can be selectively erased and programmed. EEPROMs can be erased one byte at a time, rather than erasing the entire chip. Hence, the process of re-programming is flexible but slow.

Serial Access Memory

顺序访问表示系统必须从存储器地址的开始搜索存储设备，直到找到所需的数据片段为止。支持此类访问的存储设备称为顺序访问存储器或串行访问存储器。磁带是串行访问存储器的示例。

Sequential access means the system must search the storage device from the beginning of the memory address until it finds the required piece of data. Memory device which supports such access is called a Sequential Access Memory or Serial Access Memory. Magnetic tape is an example of serial access memory.

Direct Access Memory

直接访问存储器或随机存取存储器是指系统可以直接获取用户所需信息的条件。支持此类访问的存储设备称为直接访问存储器。磁盘、光盘是直接访问存储器的示例。

Direct access memory or Random Access Memory, refers to conditions in which a system can go directly to the information that the user wants. Memory device which supports such access is called a Direct Access Memory. Magnetic disks, optical disks are examples of direct access memory.

Cache Memory

高速缓存是能够加快 CPU 速度的超高速半导体存储器。它充当 CPU 和主存储器之间的缓冲区。它用于保存 CPU 最常使用的那些数据和程序部分。操作系统将数据和程序的部分从磁盘传输到高速缓存，CPU 可以从该部分访问它们。

Cache memory is a very high speed semiconductor memory which can speed up CPU. It acts as a buffer between the CPU and main memory. It is used to hold those parts of data and program which are most frequently used by CPU. The parts of data and programs, are transferred from disk to cache memory by operating system, from where CPU can access them.

Advantages

Cache memory is faster than main memory.
It consumes less access time as compared to main memory.
It stores the program that can be executed within a short period of time.
It stores data for temporary use.

Disadvantages

Cache memory has limited capacity.
It is very expensive.

虚拟存储器是一种技术，允许执行尚未完全在内存中可用的进程。此方案的主要可见优势是程序可以大于物理存储器。虚拟存储器是用户逻辑存储器和物理存储器之间的分离。

Virtual memory is a technique that allows the execution of processes which are not completely available in memory. The main visible advantage of this scheme is that programs can be larger than physical memory. Virtual memory is the separation of user logical memory from physical memory.

这种分离允许在仅提供较小物理存储器时，为程序员提供极大的虚拟存储器。当整个程序不需要完全加载到主存储器中时，以下是这种情况。

This separation allows an extremely large virtual memory to be provided for programmers when only a smaller physical memory is available. Following are the situations, when entire program is not required to be loaded fully in main memory.

User written error handling routines are used only when an error occurred in the data or computation.
Certain options and features of a program may be used rarely.
Many tables are assigned a fixed amount of address space even though only a small amount of the table is actually used.
The ability to execute a program that is only partially in memory would counter many benefits.
Less number of I/O would be needed to load or swap each user program into memory.
A program would no longer be constrained by the amount of physical memory that is available.
Each user program could take less physical memory, more programs could be run the same time, with a corresponding increase in CPU utilization and throughput.

Auxiliary Memory

辅助内存的尺寸远大于主内存，但速度较慢。它通常存储系统程序、指令和数据文件。它还称为二级存储器。当主内存容量超出时，它还可用作溢出/虚拟内存。二级存储器无法被处理器直接访问。先将辅助内存的数据/信息传输到主内存，CPU 随后可以访问该信息。辅助内存的特点如下所列：

Auxiliary memory is much larger in size than main memory but is slower. It normally stores system programs, instruction and data files. It is also known as secondary memory. It can also be used as an overflow/virtual memory in case the main memory capacity has been exceeded. Secondary memories cannot be accessed directly by a processor. First the data/information of auxiliary memory is transferred to the main memory and then that information can be accessed by the CPU. Characteristics of Auxiliary Memory are following −

Non-volatile memory − Data is not lost when power is cut off.
Reusable − The data stays in the secondary storage on permanent basis until it is not overwritten or deleted by the user.
Reliable − Data in secondary storage is safe because of high physical stability of secondary storage device.
Convenience − With the help of a computer software, authorised people can locate and access the data quickly.
Capacity − Secondary storage can store large volumes of data in sets of multiple disks.
Cost − It is much lesser expensive to store data on a tape or disk than primary memory.

CPU Architecture

微处理器与传统计算机中使用的中央处理单元 CPU 同义。微处理器 (MPU) 充当执行以下任务的设备或设备组。

Microprocessing unit is synonymous to central processing unit, CPU used in traditional computer. Microprocessor (MPU) acts as a device or a group of devices which do the following tasks.

communicate with peripherals devices
provide timing signal
direct data flow
perform computer tasks as specified by the instructions in memory

8085 Microprocessor

8085 微处理器是一种 8 位通用微处理器，能够寻址 64k 内存。该处理器有 40 个引脚，需要 +5 V 单电源和 3 MHz 单相时钟。

The 8085 microprocessor is an 8-bit general purpose microprocessor which is capable to address 64k of memory. This processor has forty pins, requires +5 V single power supply and a 3-MHz single-phase clock.

Block Diagram

ALU

ALU 执行微处理器的计算功能。它包括累加器、临时寄存器、算术和逻辑电路以及五个标志。结果存储在累加器和标志中。

The ALU perform the computing function of microprocessor. It includes the accumulator, temporary register, arithmetic & logic circuit & and five flags. Result is stored in accumulator & flags.

Block Diagram

Accumulator

它是一个 8 位的寄存器，是 ALU 的一部分。该寄存器用于存储 8 位数据，并在执行算术和逻辑运算中使用。运算结果存储在累加器中。

It is an 8-bit register that is part of ALU. This register is used to store 8-bit data & in performing arithmetic & logic operation. The result of operation is stored in accumulator.

Diagram

Flags

标志是可编程的。可以通过使用指令从寄存器存储和传输数据。ALU 包括五个触发器，这些触发器根据累加器和其他寄存器中的数据条件进行设置和复位。

Flags are programmable. They can be used to store and transfer the data from the registers by using instruction. The ALU includes five flip-flops that are set and reset according to data condition in accumulator and other registers.

S (Sign) flag − After the execution of an arithmetic operation, if bit D7 of the result is 1, the sign flag is set. It is used to signed number. In a given byte, if D7 is 1 means negative number. If it is zero means it is a positive number.
Z (Zero) flag − The zero flag is set if ALU operation result is 0.
AC (Auxiliary Carry) flag − In arithmetic operation, when carry is generated by digit D3 and passed on to digit D4, the AC flag is set. This flag is used only internally BCD operation.
P (Parity) flag − After arithmetic or logic operation, if result has even number of 1s, the flag is set. If it has odd number of 1s, flag is reset.
C (Carry) flag − If arithmetic operation result is in a carry, the carry flag is set, otherwise it is reset.

Register section

它基本上是一个存储设备，通过使用指令从寄存器传输数据。

It is basically a storage device and transfers data from registers by using instructions.

Stack Pointer (SP) − The stack pointer is also a 16-bit register which is used as a memory pointer. It points to a memory location in Read/Write memory known as stack. In between execution of program, sometime data to be stored in stack. The beginning of the stack is defined by loading a 16-bit address in the stack pointer.
Program Counter (PC) − This 16-bit register deals with fourth operation to sequence the execution of instruction. This register is also a memory pointer. Memory location have 16-bit address. It is used to store the execution address. The function of the program counter is to point to memory address from which next byte is to be fetched.
Storage registers − These registers store 8-bit data during a program execution. These registers are identified as B, C, D, E, H, L. They can be combined as register pair BC, DE and HL to perform some 16 bit operations.

Time and Control Section

此单元负责根据时钟脉冲同步微处理器操作，并生成微处理器和外围设备之间平稳通信所需的控制信号。RD 栏和 WR 栏信号是同步脉冲，指示数据是否在数据总线上可用。控制单元负责控制微处理器、存储器和外围设备之间的数据流。

This unit is responsible to synchronize Microprocessor operation as per the clock pulse and to generate the control signals which are necessary for smooth communication between Microprocessor and peripherals devices. The RD bar and WR bar signals are synchronous pulses which indicates whether data is available on the data bus or not. The control unit is responsible to control the flow of data between microprocessor, memory and peripheral devices.

PIN diagram

所有信号都可以分为六组

All the signal can be classified into six groups

S.N.

Group

Description

Address bus

The 8085 microprocessor has 8 signal line, A15 - A8 which are uni directional and used as a high order address bus.

Data bus

The signal line AD7 - AD0 are bi-directional for dual purpose. They are used as low order address bus as well as data bus.

Control signal and Status signal

Control Signal RD bar − It is a read control signal (active low). If it is active then memory read the data. WR bar − It is write control signal (active low). It is active when written into selected memory. Status signal ALU (Address Latch Enable) − When ALU is high. 8085 microprocessor use address bus. When ALU is low. 8085 microprocessor is use data bus. IO/M bar − This is a status signal used to differentiate between i/o and memory operations. When it is high, it indicate an i/o operation and when it is low, it indicate memory operation. S1 and S0 − These status signals, similar to i/o and memory bar, can identify various operations, but they are rarely used in small system.

Power supply and frequency signal

Vcc − +5v power supply. Vss − ground reference. X, X − A crystal is connected at these two pins. The frequency is internally divided by two operate system at 3-MHz, the crystal should have a frequency of 6-MHz. CLK out − This signal can be used as the system clock for other devices.

Externally initiated signal

Advantage

这些在代码密度与指令之间的折衷很容易解码。

These compromise between code density & instruction of these type are very easy to decode.

Addressing Modes

寻址模式提供了处理器访问给定数据地址的不同方法。操作的数据存储在内存位置中，每条指令都需要某些要操作的数据。有各种指定数据地址的技术。这些技术称为寻址模式。

Addressing mode provides different ways for accessing an address to given data to a processor. Operated data is stored in the memory location, each instruction required certain data on which it has to operate. There are various techniques to specify address of data. These techniques are called Addressing Modes.

Direct addressing mode − In the direct addressing mode, address of the operand is given in the instruction and data is available in the memory location which is provided in instruction. We will move this data in desired location.
Indirect addressing mode − In the indirect addressing mode, the instruction specifies a register which contain the address of the operand. Both internal RAM and external RAM can be accessed via indirect addressing mode.
Immediate addressing mode − In the immediate addressing mode, direct data is given in the operand which move the data in accumulator. It is very fast.
Relative addressing mode − In the relative address mode, the effective address is determined by the index mode by using the program counter in stead of general purpose processor register. This mode is called relative address mode.
Index addressing mode − In the index address mode, the effective address of the operand is generated by adding a content value to the contents of the register. This mode is called index address mode.