Digital-electronics 简明教程

Digital Electronics - Demultiplexers

What is a Demultiplexer?

解复用器是一种组合逻辑电路，它接收单个输入信号，并将它分配到多个输出线上。解复用器也简称为解复码器。由于解复用器用于将相同数据传输到不同的目的地，因此它也被称为数据分配器。

A Demultiplexer is a combinational logic circuit that accepts a single input and distributes it over several output lines. Demultiplexer is also termed as DEMUX in short. As Demultiplexer is used to transmit the same data to different destinations, hence it is also known as data distributor.

还有一种组合逻辑电路称为复用器，它执行与解复用器相反的操作，即接收多个输入信号并一次将其中一个传输到输出线。

There is another combinational logic circuit named multiplexer which performs opposite operation of the Demultiplexer, i.e. accepts several inputs and transmits one of them at time to the output line.

从定义中，我们可以得出，解复用器是一个 1 对 2n 的器件。典型的 1×2n 解复用器的功能框图如下图所示。

From the definition, we can state that a Demultiplexer is a 1-to-2n device. The functional block diagram of a typical 1×2n Demultiplexer is shown in Figure-1.

可以看出，解复用器只有一个数据输入线、2n 个输出线和 n 个选择线。施加到解复用器选择线上的逻辑电平决定了输入数据将传输到的输出通道。

It can be seen that the Demultiplexer has only one data input line, 2n output lines, and n select lines. The logic level applied to select lines of the Demultiplexer determines the output channel to which the input data will be transmitted.

解复用器电路是数字译码器和布尔函数发生器电路中广泛使用的组合逻辑电路。

Demultiplexer circuit are the combinational logic circuit widely used in digital decoders and Boolean function generator circuits.

Types of Demultiplexer

根据输出线数（2n），解复用器可以分为多种类型。一些常用的解复用器类型包括 −

Based on the number of output lines (2n), Demultiplexers can be classified into several types. Some commonly used types of Demultiplexers are −

1×2 Demultiplexer
1×4 Demultiplexer

现在，让我们简要讨论每种类型的解复用器。

Now, let us briefly discuss each type of Demultiplexer.

1×2 Demultiplexer

1×2 解复用器的功能框图如下图所示。

The functional block diagram of a 1×2 Demultiplexer is shown in Figure-2.

1×2 解复用器由 1 个输入线 (I)、1 个选择线 (S) 和 2 个输出线 (Y0 和 Y1) 组成。施加到选择线上的逻辑电平决定了输入数据将传输到的输出线。

The 1×2 Demultiplexer consists of 1 input line (I), 1 select line (S), and 2 output lines (Y0 and Y1). The logic level applied at the select line determines the output line to which the input data will be transmitted.

1×2 解复用器的操作可以通过其给出的功能表来分析。

The operation of the 1×2 Demultiplexer can be analyzed with the help of its function table given below.

Select Line

Outputs

根据此 1×2 解复用器的功能表，我们可以直接推导出每个输出的布尔表达式，如下所示。

From this function table of 1×2 Demultiplexer, we can directly derive the Boolean expression for each output as follow.

\mathrm{Y_{0} \: = \: \bar{S} \: I}

并且，

And,

\mathrm{Y_{1} \: = \: S \: I}

1×4 Demultiplexer

1×4 解复用器的功能框图如图 3 所示。

The functional block diagram of 1×4 Demultiplexer is shown in Figure-3.

1×4 解复用器有 1 个输入线 (I)、2 个选择线 (S0 和 S1) 和 4 个输出线 (Y0、Y1、Y2 和 Y3)。施加到选择线的逻辑电平决定输入数据 (I) 将传输到的输出线。

The 1×4 Demultiplexer has 1 input line (I), 2 select line (S0 and S1), and 4 output lines (Y0, Y1, Y2, and Y3). The logic level applied to the select lines determines the output line to which the input data (I) will be transmitted.

1×4 解复用器的操作可以通过其下面给出的功能表来理解。

The operation of the 1×4 Demultiplexer can be understood with the help of its function table given below.

Select Line	Outputs
S1	S0
Y3	Y2
Y1	Y0
0	0
0	0
0	I
0	1
0	0
I	0
1	0
0	I
0	0
1	1
I	0
0	0

根据此 1×4 解复用器的真值表，我们可以直接写出每个输出的布尔表达式，如下所示。

From this truth table of 1×4 Demultiplexer, we can directly write the Boolean expression for each output as follow.

\mathrm{Y_{0} \: = \: \bar{S_{1}} \: \bar{S_{0}} \: I}

\mathrm{Y_{1} \: = \: \bar{S_{1}} \: S_{0} \: I}

\mathrm{Y_{2} \: = \: S_{1} \: \bar{S_{0}} \: I}

\mathrm{Y_{3} \: = \: S_{1} \: S_{0} \: I}

我们可以轻松理解上述电路的操作。同样，你可以按照相同步骤来实现 1×8 解复用器和 1×16 解复用器。

We can easily understand the operation of the above circuit. Similarly, you can implement 1×8 Demultiplexer and 1×16 Demultiplexer by following the same procedure.

Implementation of Higher-order Demultiplexer

现在，让我们使用低阶解复用器来实现以下两个高阶解复用器。

Now, let us implement the following two higher-order Demultiplexers using lower-order Demultiplexers.

1×8 Demultiplexer
1×16 Demultiplexer

1×8 Deultiplexer

在本节中，让我们使用 1×4 解复用器和 1×2 解复用器来实现 1×8 解复用器。我们知道 1×4 解复用器有单个输入、两个选择线和四个输出。而 1×8 解复用器有单个输入、三个选择线和八个输出。

In this section, let us implement 1×8 Demultiplexer using 1×4 Demultiplexers and 1×2 Demultiplexer. We know that 1×4 Demultiplexer has single input, two selection lines and four outputs. Whereas, 1×8 Demultiplexer has single input, three selection lines and eight outputs.

因此，我们需要在第二级中两个 1×4 Demultiplexers 才能获得最终的八个输出。由于第二级中的输入数量为两个，因此我们需要在第一级中 1×2 Demultiplexer ，以便第一级的输出成为第二级的输入。此 1×2 解复用器的输入是 1×8 解复用器的整体输入。

So, we require two 1×4 Demultiplexers in second stage in order to get the final eight outputs. Since, the number of inputs in second stage is two, we require 1×2 Demultiplexer in first stage so that the outputs of first stage will be the inputs of second stage. Input of this 1×2 Demultiplexer will be the overall input of 1×8 Demultiplexer.

令 1×8 解复用器有一个输入 I、三个选择线 s2、s1 和 s0 以及输出 Y7 到 Y0。1×8 解复用器的 Truth table 如下所示。

Let the 1×8 Demultiplexer has one input I, three selection lines s2, s1 & s0 and outputs Y7 to Y0. The Truth table of 1×8 Demultiplexer is shown below.

Selection Inputs	Outputs
s2	s1
s0	Y7
Y6	Y5
Y4	Y3
Y2	Y1
Y0	0
0	0
0	0
0	0
0	0
0	I
0	0
1	0
0	0
0	0
0	I
0	0
1	0
0	0
0	0
0	I
0	0
0	1
1	0
0	0
0	I
0	0
0	1
0	0
0	0
0	I
0	0
0	0
1	0
1	0
0	I
0	0
0	0
0	1
1	0
0	I
0	0
0	0
0	0
1	1
1	I
0	0
0	0
0	0

我们可以通过考虑上述真值表轻松使用低阶多路复用器来实现 1×8 解复用器。1×8 解复用器的 block diagram 如以下图表所示。

We can implement 1×8 Demultiplexer using lower order Multiplexers easily by considering the above Truth table. The block diagram of 1×8 Demultiplexer is shown in the following figure.

公共 selection lines, s1 & s0 应用于两个 1×4 解复用器。上部 1×4 解复用器的输出为 Y7 到 Y4，下部 1×4 解复用器的输出为 Y3 到 Y0。

The common selection lines, s1 & s0 are applied to both 1×4 Demultiplexers. The outputs of upper 1×4 Demultiplexer are Y7 to Y4 and the outputs of lower 1×4 Demultiplexer are Y3 to Y0.

另一个 selection line, s2 应用于 1×2 解复用器。如果 s2 为零，则根据选择线 s1 和 s0 的值，下部 1×4 解复用器的四个输出中的一个将等于输入 I。类似地，如果 s2 为一，则根据选择线 s1 和 s0 的值，上部 1×4 解复用器的四个输出之一将等于输入 I。

The other selection line, s2 is applied to 1×2 Demultiplexer. If s2 is zero, then one of the four outputs of lower 1×4 Demultiplexer will be equal to input, I based on the values of selection lines s1 & s0. Similarly, if s2 is one, then one of the four outputs of upper 1×4 Demultiplexer will be equal to input, I based on the values of selection lines s1 & s0.

1×16 Demultiplexer

在本部分，我们将使用 1×8 解码器和 1×2 解码器来实现 1×16 解码器。我们知道，1×8 解码器拥有单输入、三个选择线和八个输出。而 1×16 解码器拥有单输入、四个选择线和十六个输出。

In this section, let us implement 1×16 Demultiplexer using 1×8 Demultiplexers and 1×2 Demultiplexer. We know that 1×8 Demultiplexer has single input, three selection lines and eight outputs. Whereas, 1×16 Demultiplexer has single input, four selection lines and sixteen outputs.

所以，我们需要两个 1×8 Demultiplexers 作为第二个阶段才能获得最终的十六个输出。由于第二个阶段的输入数量为两个，我们需要 1×2 Demultiplexer 作为第一个阶段，这样第一个阶段的输出才能作为第二个阶段的输入。这个 1×2 解码器的输入将作为 1×16 解码器的整体输入。

So, we require two 1×8 Demultiplexers in second stage in order to get the final sixteen outputs. Since, the number of inputs in second stage is two, we require 1×2 Demultiplexer in first stage so that the outputs of first stage will be the inputs of second stage. Input of this 1×2 Demultiplexer will be the overall input of 1×16 Demultiplexer.

让 1×16 解码器有一个输入 I、四个选择线 s3、s2、s1 和 s0，以及输出 Y15 到 Y0。 block diagram 使用较低阶的多路复用器的 1×16 解码器在下图中显示。

Let the 1×16 Demultiplexer has one input I, four selection lines s3, s2, s1 & s0 and outputs Y15 to Y0. The block diagram of 1×16 Demultiplexer using lower order Multiplexers is shown in the following figure.

常见的 selection lines s2, s1 & s0 应用于 1×8 解码器。上部 1×8 解码器的输出是 Y15 到 Y8，而下部 1×8 解码器的输出是 Y7 到 Y0。

The common selection lines s2, s1 & s0 are applied to both 1×8 Demultiplexers. The outputs of upper 1×8 Demultiplexer are Y15 to Y8 and the outputs of lower 1×8 Demultiplexer are Y7 to Y0.

另一个 selection line, s3 应用于 1×2 解码器。如果 s3 为零，那么下部 1×8 解码器的八个输出之一将等于输入 I，具体取决于选择线 s2、s1 和 s0 的值。类似地，如果 s3 为一，那么上部 1×8 解码器的八个输出之一将等于输入 I，具体取决于选择线 s2、s1 和 s0 的值。

The other selection line, s3 is applied to 1×2 Demultiplexer. If s3 is zero, then one of the eight outputs of lower 1×8 Demultiplexer will be equal to input, I based on the values of selection lines s2, s1 & s0. Similarly, if s3 is one, then one of the 8 outputs of upper 1×8 Demultiplexer will be equal to input, I based on the values of selection lines s2, s1 & s0.

Integrated Circuits (ICs) Working as Demultiplexer

解码器也可以制造为 IC 的形式。有多种可用 IC 作为解码器工作。下面列出了一些常见的 IC：

Demultiplexer can also be built in the form of ICs. There are several types of ICs available that work as Demultiplexer. Some common of them are listed below −

74139 IC works as a 1×4 Demultiplexer
74237 IC works as a 1×8 Demultiplexer
74154 IC works as a 1×16 Demultiplexer

Advantages of Demultiplexer

解码器的主要优点如下：

The important advantages of Demultiplexer are given below −

By using Demultiplexers, we can increase the efficiency of the communication systems.
Demultiplexer can separate different signals from a mixed signal stream.
Demultiplexer can decode the signals produced by a multiplexer.

Disadvantages of Demultiplexer

解码器的主要缺点如下：

The major disadvantages of Demultiplexers are listed below −

The use of Demultiplexer can cause wastage of bandwidth.
The synchronization of signals can create a delay in the system.

Applications of Demultiplexer

解码器是一个重要的组合逻辑电路，用于多种应用。下面列出解码器的一些重要用途：

Demultiplexer is a crucial combinational logic circuit which is used in a number of applications. Some important uses of Demultiplexers are listed below −

Demultiplexer are used in several input and output devices for data routing.
Demultiplexer are used in digital control systems to select one signal from a mutual stream of signals.
Demultiplexer are also employed for data transmission in synchronous systems.
Demultiplexer are also utilized in data acquisition systems.
Demultiplexer can be used for generating Boolean functions.
Demultiplexer can be used in serial to parallel converters.
Demultiplexer are used for broadcasting of ATM packets.
Demultiplexer can also be used to design automatic test equipment, etc.

这些就是解复用器、其类型和应用的所有内容。

This is all about Demultiplexer, its types, and applications.