Digital-electronics 简明教程
Implementation of AND Gate from NAND Gate
我们知道 NAND 门是通用逻辑门，因此使用 NAND 门，我们可以实现任何逻辑门或任何其它逻辑表达式。阅读本教程以了解如何使用 NAND 门来实现 AND 门。我们从 AND 和 NAND 门的基本概述开始。
As we know that the NAND Gate is a universal logic gate, therefore using the NAND gate, we can implement any logic gate or any other logical expression. Read this tutorial to understand how you can implement an AND gate using NAND gate. Let’s start with a basic overview of AND and NAND gates.
What is an AND Gate?
一个 AND Gate 是一个基本逻辑门。一个 AND 门可以有两个或两个以上的输入，但只给一个输出。如果 AND 门的任何一个输入是 LOW（逻辑 0）状态，那么 AND 门输出一个 LOW（逻辑 0）；否则，它输出一个 HIGH（逻辑 1）。因此，只有当 AND 门的所有输入都是 HIGH 或逻辑 1 状态时，AND 门的输出才是 HIGH 或逻辑 1 状态。
An AND Gate is a basic logic gate. An AND gate may have two or more than two inputs, but gives only one output. The AND gate gives a LOW (Logic 0) output if any one of its inputs is in the LOW or Logic 0 state, otherwise, it gives a HIGH (Logic 1) state as output. Therefore, the output of the AND gate is HIGH or Logic 1 state, only if all its inputs are HIGH or Logic 1 state.
AND 门也称为 "all or nothing gate" 。一个两个输入的 AND 门的逻辑符号如图 1 所示。
The AND gate is also known as an "all or nothing gate". The logic symbol of a two input AND gate is shown in Figure-1.
Output Equation of AND Gate
如果 A 和 B 是一个 AND 门的输入变量，Y 是输出变量，则 AND 门的输出方程可表示为
If A and B are the input variables and Y is the output variable for an AND gate, then the output equation of the AND gate is given by,
\mathrm{Y \: = \: A\cdot B}
其中，“·”（点）符号表示 AND 运算。它表示为 Y 等于 A 与 B。
Where, the "·" (dot) symbol represents the AND operation. It is read as Y is equal to A AND B.
What is a NAND Gate?
NAND 门是一种通用逻辑门。通用逻辑门是可以用来实现任何类型的逻辑表达式或任何其它类型逻辑门的逻辑门。
The NAND Gate is a type of universal logic gate. Where, a universal logic gate is one that can be used to realize any kind logical expression or any other type of logic gate.
一个 NAND 门基本上是两个基本逻辑门的组合，即 AND 门和 NOT 门，即
A NAND gate is basically a combination of two basic logic gates namely AND gate and NOT gate, i.e.
\mathrm{NAND \: Logic \: = \: AND \: Logic \: + \: NOT \: Logic}
NAND 门是一种当所有输入都是 HIGH 时输出为 LOW（逻辑 0），当任何一种输入为 LOW（逻辑 0）时输出为 HIGH（逻辑 1）的逻辑门。因此，NAND 门的操作与 AND 门相反。一个两个输入的 NAND 门的逻辑符号如图 2 所示。
A NAND gate is the type of logic gate whose output is LOW (Logic 0) when all its inputs are high, and its output is HIGH (Logic 1), when any of its inputs is LOW (Logic 0). Therefore, the operation of the NAND gate is opposite that of the AND gate. The logic symbol of a two input NAND gate is shown in Figure-2.
Output Equation of NAND Gate
如果 A 和 B 是一个 NAND 门的输入变量，Y 是输出变量，则其输出可表示为
If A and B are the input variables and Y is the output variable of the NAND gate, then its output is given by,
\mathrm{Y | \: = \: \overline{A \: \cdot \: B} \: = \: (\arrowvert A \: \cdot \: B)'}
它表示为“Y 等于 A·B 上划线”。
It is read as "Y is equal to A·B whole bar".
以下是 NAND 门的真值表 −
The following is the truth table of the NAND gate −
Input |
Output |
A |
B |
Y = (A · B)' |
0 |
0 |
1 |
0 |
1 |
1 |
1 |
0 |
1 |
1 |
1 |
现在，我们来讨论通过 NAND 门实现 AND 门。
Now, let us discuss the implementation of AND Gate from NAND Gate.
Implementation of AND Gate from NAND Gate
如上所述，NAND 门是一种通用逻辑门，因为它可用于实现任何其他逻辑门。使用 NAND 门实现 AND 门的过程如图 3 所示。
As discussed above that the NAND gate is a type of universal logic gate, because it can be used to implement any other logic gate. The implementation of an AND gate using NAND gate is shown in Figure-3.
从此电路图可以明显看出，通过 NAND 门实现 AND 门非常简单，因为我们只需要两个 NAND 门。
From this circuit diagram, it is clear that the implementation of the AND gate from NAND gate is quite simple, as we just require two NAND gates.
其中，第一个 NAND 门产生输入 A 和 B 的互补二进制乘积，而第二个 NAND 门再次对第一个 NAND 门的输出进行互补以产生一个 AND 输出。因此，图 3 中所示的 NAND 门逻辑电路等同于 AND 门。
Where, the first NAND gate produce a complement binary product of inputs A and B, while the second NAND gate again complement the output of first NAND gate to produce an AND output. Therefore, the logic circuit using NAND gates shown in figure-3 is equivalent to the AND gate.
Output Equation
第一个 NAND 门产生的输出为：
The output produced by the first NAND gate is,
\mathrm{Y_{1} \: = \: \overline{A \: \cdot \: B}}
第二个 NAND 门产生的输出为：
The output produced by the second NAND gate is,
\mathrm{Y \: = \: \overline{\overline{A \: \cdot \: B}} \: = \: A \: \cdot \: B}
这是 AND 门的输出方程。
This is the output equation of the AND gate.