Digital-electronics 简明教程

Two Level Logic Realization

two level logic 中存在于输入和输出之间的最大逻辑层次为 2。这意味着，无论逻辑门总数量如何，任何输入和输出之间存在的（级联）逻辑门的最大数量在两级逻辑中为 2。此处，第一级逻辑门的输出连接为第二级逻辑门的输入。

The maximum number of levels that are present between inputs and output is two in two level logic. That means, irrespective of total number of logic gates, the maximum number of Logic gates that are present (cascaded) between any input and output is two in two level logic. Here, the outputs of first level Logic gates are connected as inputs of second level Logic gate(s).

考虑四个逻辑门 AND、OR、NAND 和 NOR。由于有 4 个逻辑门，我们将获得 16 种实现两级逻辑的可能方式。它们是 AND-AND、AND-OR、ANDNAND、AND-NOR、OR-AND、OR-OR、OR-NAND、OR-NOR、NAND-AND、NAND-OR、NANDNAND、NAND-NOR、NOR-AND、NOR-OR、NOR-NAND、NOR-NOR。

Consider the four Logic gates AND, OR, NAND & NOR. Since, there are 4 Logic gates, we will get 16 possible ways of realizing two level logic. Those are AND-AND, AND-OR, ANDNAND, AND-NOR, OR-AND, OR-OR, OR-NAND, OR-NOR, NAND-AND, NAND-OR, NANDNAND, NAND-NOR, NOR-AND, NOR-OR, NOR-NAND, NOR-NOR.

这两种两级逻辑实现可以分为以下两类。

These two level logic realizations can be classified into the following two categories.

  1. Degenerative Form

  2. Non-degenerative Form

Degenerative Form

如果单一逻辑门可以获取两级逻辑实现的输出，则称之为 degenerative form 。很明显，单一逻辑门的输入数量增加了。因此，逻辑门的扇入增加了。这是退化形式的一个优点。

If the output of two level logic realization can be obtained by using single Logic gate, then it is called as degenerative form. Obviously, the number of inputs of single Logic gate increases. Due to this, the fan-in of Logic gate increases. This is an advantage of degenerative form.

16 种组合中只有两级逻辑实现的 6 combinations 属于退化形式。这些形式是：AND-AND、AND-NAND、OR-OR、OR-NOR、NAND-NOR、NOR-NAND。

Only 6 combinations of two level logic realizations out of 16 combinations come under degenerative form. Those are AND-AND, AND-NAND, OR-OR, OR-NOR, NAND-NOR, NORNAND.

在这一部分，我们来讨论一些实现。假设 A、B、C 和 D 是输入，而 Y 是每个逻辑实现中的输出。

In this section, let us discuss some realizations. Assume, A, B, C & D are the inputs and Y is the output in each logic realization.

AND-AND Logic

在这个逻辑实现中，AND 门同时存在于两级。下图展示了 AND-AND logic 实现的一个例子。

In this logic realization, AND gates are present in both levels. Below figure shows an example for AND-AND logic realization.

and and logic gate

我们可以将第一级逻辑门的输出获取为 Y1 = AB 和 Y2 = CD

We will get the outputs of first level logic gates as Y1 = AB and Y2 = CD

这些输出 Y1 和 Y2 被用作第二级中 AND 门的输入。所以，此 AND 门的输出为

These outputs, Y1 and Y2 are applied as inputs of AND gate that is present in second level. So, the output of this AND gate is

\mathrm{Y\:=\:Y_{1}Y_{2}}

在以上公式中代入 Y1 和 Y2 的值。

Substitute Y1 and Y2 values in the above equation.

\mathrm{Y \: = \: (AB)(CD)}

\mathrm{\Rightarrow \: Y \: = \: ABCD}

因此，此 AND-AND 逻辑实现的输出为 ABCD 。此布尔函数可以通过使用 4 输入 AND 门来实现。因此，它是 degenerative form 。

Therefore, the output of this AND-AND logic realization is ABCD. This Boolean function can be implemented by using a 4 input AND gate. Hence, it is degenerative form.

AND-NAND Logic

在这个逻辑实现中，AND 门存在于第一级，而 NAND 门存在于第二级。下图展示了 AND-NAND logic 实现的一个例子。

In this logic realization, AND gates are present in first level and NAND gate(s) are present in second level. The following figure shows an example for AND-NAND logic realization.

and nand logic

之前，我们已将第一级逻辑门的输出获取为 Y1 = AB 和 Y2 = CD

Previously, we got the outputs of first level logic gates as Y1 = AB and Y2 = CD

这些输出 Y1 和 Y2 被用作第二级中 NAND 门的输入。所以，此 NAND 门的输出为

These outputs, Y1 and Y2 are applied as inputs of NAND gate that is present in second level. So, the output of this NAND gate is

\mathrm{Y \: = \:(Y_{1}Y_{2})'}

在以上公式中代入 Y1 和 Y2 的值。

Substitute Y1 and Y2 values in the above equation.

\mathrm{Y \: = \: AB)(CD '}

\mathrm{Y \: = \: AB)(CD'}

\mathrm{\Rightarrow \: Y \: = \: (ABCD)'}

因此，此 AND 门-NAND 门逻辑实现的输出为 (ABCD)'。此布尔函数可以通过使用 4 输入 NAND 门来实现。因此，它是 degenerative form 。

Therefore, the output of this AND-NAND logic realization is (ABCD)'. This Boolean function can be implemented by using a 4 input NAND gate. Hence, it is degenerative form.

OR-OR Logic

在这个逻辑实现中，OR 门同时存在于两级。下图展示了 OR-OR logic 实现的一个例子。

In this logic realization, OR gates are present in both levels. The following figure shows an example for OR-OR logic realization.

or or logic

我们将得到第一级逻辑门输出为 Y1 = A + B，Y2 = C + D。

We will get the outputs of first level logic gates as Y1 = A + B and Y2 = C + D.

这些输出 Y1 和 Y2 被用作第二级存在的 OR 门的输入。因此，此 OR 门的输出为

These outputs, Y1 and Y2 are applied as inputs of OR gate that is present in second level. So, the output of this OR gate is

\mathrm{Y \:= \: Y_{1}\:+\:Y_{2}}

在以上公式中代入 Y1 和 Y2 的值。

Substitute Y1 and Y2 values in the above equation.

\mathrm{Y \: = \: (A\:+\:B) \: + \: (C\:+\:D)}

\mathrm{\Rightarrow \: Y \:=\:A\:+\:B\:+\:C\:+\:D}

因此，此 OR-OR 逻辑实现的输出为 A + B + C + D 。此布尔函数可通过使用 4 个输入的 OR 门实现。因此，它是 degenerative form 。

Therefore, the output of this OR-OR logic realization is A + B + C + D. This Boolean function can be implemented by using a 4 input OR gate. Hence, it is degenerative form.

同样，您可以验证剩余实现是否属于此类。

Similarly, you can verify whether the remaining realizations belong to this category or not.

Non-degenerative Form

如果无法通过使用单个逻辑门获得两级逻辑实现的输出，则称为 non-degenerative form 。

If the output of two level logic realization can’t be obtained by using single logic gate, then it is called as non-degenerative form.

其余 10 combinations 的两级逻辑实现属于非退化形式。它们是 AND-OR、AND-NOR、OR-AND、OR-NAND、NAND-AND、NANDOR、NAND-NAND、NOR-AND、NOR-OR、NOR-NOR。

The remaining 10 combinations of two level logic realizations come under nondegenerative form. Those are AND-OR, AND-NOR, OR-AND, OR-NAND, NAND-AND, NANDOR, NAND-NAND, NOR-AND, NOR-OR, NOR-NOR.

现在，让我们讨论一些实现。假设 A、B、C 和 D 是每个逻辑实现中的输入，Y 是输出。

Now, let us discuss some realizations. Assume, A, B, C & D are the inputs and Y is the output in each logic realization.

AND-OR Logic

在此逻辑实现中，AND 门存在于第一级，而 OR 门存在于第二级。下图显示了一个 AND-OR logic 实现的示例。

In this logic realization, AND gates are present in first level and OR gate(s) are present in second level. Below figure shows an example for AND-OR logic realization.

and or logic

之前，我们获得了第一级逻辑门输出为 Y1 = AB 和 Y2 = CD。

Previously, we got the outputs of first level logic gates as Y1 = AB and Y2 = CD.

这些输出 Y1 和 Y2 被用作第二级存在的 OR 门的输入。因此，此 OR 门的输出为

These outputs, Y1 and Y2 are applied as inputs of OR gate that is present in second level. So, the output of this OR gate is

\mathrm{Y\:=\:Y_{1}\:+\:Y_{2}}

在上述方程中代入 Y1 和 Y2 值

Substitute Y1 and Y2 values in the above equation

\mathrm{Y\:=\:AB\:+\:CD}

因此，此 AND-OR 逻辑实现的输出为 AB + CD 。此布尔函数采用 Sum of Products 形式。由于我们无法通过使用单个逻辑门实现它，因此此 AND-OR 逻辑实现是一个 non-degenerative form 。

Therefore, the output of this AND-OR logic realization is AB + CD. This Boolean function is in Sum of Products form. Since, we can’t implement it by using single logic gate, this AND-OR logic realization is a non-degenerative form.

AND-NOR Logic

在此逻辑实现中，AND 门存在于第一级，而 NOR 门存在于第二级。下图显示了一个 AND-NOR logic 实现的示例。

In this logic realization, AND gates are present in first level and NOR gate(s) are present in second level. The following figure shows an example for AND-NOR logic realization.

and nor logic

我们知道第一级逻辑门的输出为 Y1 = AB 和 Y2 = CD

We know the outputs of first level logic gates as Y1 = AB and Y2 = CD

这些输出 Y1 和 Y2 被用作第二级存在的 NOR 门的输入。因此，此 NOR 门的输出为

These outputs, Y1 and Y2 are applied as inputs of NOR gate that is present in second level. So, the output of this NOR gate is

\(\mathrm{Y \:=\:(Y_{1}\:+\:Y_{2})'}\)

\mathrm{Y \:=\:(Y_{1}\:+\:Y_{2})'}

在以上公式中代入 Y1 和 Y2 的值。

Substitute Y1 and Y2 values in the above equation.

\(\mathrm{Y\:=\:(AB\:+\:CD)'}\)

\mathrm{Y\:=\:(AB\:+\:CD)'}

因此，此与非逻辑实现的输出是 (AB + CD)' 。此布尔函数具有 AND-OR-Invert 形式。由于我们无法通过使用单个逻辑门来实现它，因此此与非逻辑实现是 non-degenerative form

Therefore, the output of this AND-NOR logic realization is (AB + CD)'. This Boolean function is in AND-OR-Invert form. Since, we can’t implement it by using single logic gate, this AND-NOR logic realization is a non-degenerative form

OR-AND Logic

在此逻辑实现中，或门存在于第一级，并且与门存在于第二级。下图显示了 OR-AND logic 实现的示例。

In this logic realization, OR gates are present in first level & AND gate(s) are present in second level. The following figure shows an example for OR-AND logic realization.

or and logic

之前，我们获得了第一级逻辑门的输出为 Y1 = A + B 和 Y2 = C + D。

Previously, we got the outputs of first level logic gates as Y1 = A + B and Y2 = C + D.

这些输出 Y1 和 Y2 被用作第二级中 AND 门的输入。所以，此 AND 门的输出为

These outputs, Y1 and Y2 are applied as inputs of AND gate that is present in second level. So, the output of this AND gate is

\mathrm{Y\:=\:Y_{1}Y_{2}}

在以上公式中代入 Y1 和 Y2 的值。

Substitute Y1 and Y2 values in the above equation.

\(\mathrm{Y \: = \: (A\:+\:B)(C\:+\:D)}\)

\mathrm{Y \: = \: (A\:+\:B)(C\:+\:D)}

因此，此或与逻辑实现的输出为 (A + B) (C + D) 。此布尔函数具有 Product of Sums 形式。由于我们无法通过使用单个逻辑门来实现它，因此此或与逻辑实现是 non-degenerative form 。

Therefore, the output of this OR-AND logic realization is (A + B) (C + D). This Boolean function is in Product of Sums form. Since, we can’t implement it by using single logic gate, this OR-AND logic realization is a non-degenerative form.

同样，您可以验证剩余实现是否属于此类。

Similarly, you can verify whether the remaining realizations belong to this category or not.